| A novel architecture of the 3D stacked MRAM L2 cache for CMPs G Sun, X Dong, Y Xie, J Li, Y Chen High Performance Computer Architecture, 2009. HPCA 2009. IEEE 15th …, 2009 | 537 | 2009 |
| Hybrid cache architecture with disparate memory technologies X Wu, J Li, L Zhang, E Speight, R Rajamony, Y Xie ACM SIGARCH Computer Architecture News 37 (3), 34-45, 2009 | 482 | 2009 |
| Dynamic power-performance adaptation of parallel computation on chip multiprocessors J Li, JF Martinez High-Performance Computer Architecture, 2006. The Twelfth International …, 2006 | 370 | 2006 |
| The PERCS high-performance interconnect B Arimilli, R Arimilli, V Chung, S Clark, W Denzel, B Drerup, T Hoefler, ... High Performance Interconnects (HOTI), 2010 IEEE 18th Annual Symposium on, 75-82, 2010 | 297 | 2010 |
| The thrifty barrier: Energy-aware synchronization in shared-memory multiprocessors J Li, JF Martinez, MC Huang High Performance Computer Architecture, 2004. HPCA-10. Proceedings. 10th …, 2004 | 197 | 2004 |
| Power and performance of read-write aware hybrid caches with non-volatile memories X Wu, J Li, L Zhang, E Speight, Y Xie Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE'09 …, 2009 | 157 | 2009 |
| Power-performance considerations of parallel computing on chip multiprocessors J Li, JF Martínez ACM Transactions on Architecture and Code Optimization (TACO) 2 (4), 397-422, 2005 | 110 | 2005 |
| TAPO: Thermal-aware power optimization techniques for servers and data centers W Huang, M Allen-Ware, JB Carter, E Elnozahy, H Hamann, T Keller, ... Green Computing Conference and Workshops (IGCC), 2011 International, 1-8, 2011 | 106 | 2011 |
| Power-performance implications of thread-level parallelism on chip multiprocessors J Li, JF Martinez Performance Analysis of Systems and Software, 2005. ISPASS 2005. IEEE …, 2005 | 95 | 2005 |
| A framework for end-to-end simulation of high-performance computing systems WE Denzel, J Li, P Walker, Y Jin Simulation 86 (5-6), 331, 2010 | 83 | 2010 |
| Memory latency reduction via thread throttling HY Cheng, CH Lin, J Li, CL Yang Microarchitecture (MICRO), 2010 43rd Annual IEEE/ACM International Symposium …, 2010 | 67 | 2010 |
| Power shifting in thrifty interconnection network J Li, W Huang, C Lefurgy, L Zhang, WE Denzel, RR Treumann, K Wang High Performance Computer Architecture (HPCA), 2011 IEEE 17th International …, 2011 | 37 | 2011 |
| Design exploration of hybrid caches with disparate memory technologies X Wu, J Li, L Zhang, E Speight, R Rajamony, Y Xie ACM Transactions on Architecture and Code Optimization (TACO) 7 (3), 15, 2010 | 36 | 2010 |
| RORIB: An economic and efficient solution for real-time online remote information backup SJ Lloyd, J Peckham, Q Yang, J Li Journal of Database Management 14 (3), 56-73, 2003 | 30 | 2003 |
| Remote online information back-up system Q Yang, J Li US Patent 7,177,887, 2007 | 25 | 2007 |
| Cost-driven 3D integration with interconnect layers X Wu, G Sun, X Dong, R Das, Y Xie, C Das, J Li Design Automation Conference (DAC), 2010 47th ACM/IEEE, 150-155, 2010 | 24 | 2010 |
| Thrifty interconnection network for hpc systems J Li, L Zhang, C Lefurgy, R Treumann, WE Denzel Proceedings of the 23rd international conference on Supercomputing, 505-506, 2009 | 7 | 2009 |
| RORIB: An economic and efficient solution for real-time online remote info backup J Li, JS Lloyd, Q Yang Proceedings of the 32nd Annual Meeting of the Decision Sciences Institute, 2001 | 3 | 2001 |
| Scalable Proximity-Aware Cache Replication in Chip Multiprocessors C Li, H Wang, Y Xue, D Wang, J Li Parallel Architectures and Compilation Techniques (PACT), 2011 International …, 2011 | | 2011 |
| Simultaneous Database Backup Using TCP/IP and a Specialized Network Interface Card SJ Lloyd, J Peckham, J Li, QK Yang Advanced Topics In Database Research, 108, 2005 | | 2005 |
