A 130nm CMOS Programmable Analog Standard Cell Library J Hasler, PR Ayyappan, A Ige, P Mathews IEEE Transactions on Circuits and Systems I: Regular Papers, 2024 | 4 | 2024 |
Towards Scalable Digital Modeling of Networks of Biorealistic Silicon Neurons S Bhattacharyya, PR Ayyappan, JO Hasler IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2023 | 2 | 2023 |
A 65nm and 130nm CMOS Programmable Analog Standard Cell Library for Scalable System Synthesis P Mathews, PR Ayyappan, A Ige, S Bhattacharyya, L Yang, J Hasler 2024 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2024 | 1 | 2024 |
A 65 nm CMOS Analog Programmable Standard Cell Library for Mixed-Signal Computing PO Mathews, PR Ayyappan, A Ige, S Bhattacharyya, L Yang, JO Hasler IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2024 | | 2024 |
Toward Biorealistic Silicon Neural Circuits on Reconfigurable Platforms S Bhattacharyya, PO Mathews, PR Ayyappan, JO Hasler 2023 IEEE 66th International Midwest Symposium on Circuits and Systems …, 2023 | | 2023 |