Maximizing the performance of 650-V p-GaN gate HEMTs: Dynamic RON characterization and circuit design considerations H Wang, J Wei, R Xie, C Liu, G Tang, KJ Chen IEEE Transactions on Power Electronics 32 (7), 5539-5549, 2016 | 244 | 2016 |
Gallium nitride-based complementary logic integrated circuits Z Zheng, L Zhang, W Song, S Feng, H Xu, J Sun, S Yang, T Chen, J Wei, ... Nature electronics 4 (8), 595-603, 2021 | 153 | 2021 |
Charge Storage Mechanism of Drain Induced Dynamic Threshold Voltage Shift in -GaN Gate HEMTs J Wei, R Xie, H Xu, H Wang, Y Wang, M Hua, K Zhong, G Tang, J He, ... IEEE Electron Device Letters 40 (4), 526-529, 2019 | 130 | 2019 |
Integration of LPCVD-SiNxgate dielectric with recessed-gate E-mode GaN MIS-FETs: Toward high performance, high stability and long TDDB lifetime M Hua, Z Zhang, J Wei, J Lei, G Tang, K Fu, Y Cai, B Zhang, KJ Chen 2016 IEEE International Electron Devices Meeting (IEDM), 10.4. 1-10.4. 4, 2016 | 119 | 2016 |
High and / Ratio Enhancement-Mode Buried -Channel GaN MOSFETs on -GaN Gate Power HEMT Platform Z Zheng, W Song, L Zhang, S Yang, J Wei, KJ Chen IEEE Electron Device Letters 41 (1), 26-29, 2019 | 101 | 2019 |
Frequency- and Temperature-Dependent Gate Reliability of Schottky-Type -GaN Gate HEMTs J He, J Wei, S Yang, Y Wang, K Zhong, KJ Chen IEEE Transactions on Electron Devices 66 (8), 3453-3458, 2019 | 97 | 2019 |
Low on-resistance normally-off GaN double-channel metal–oxide–semiconductor high-electron-mobility transistor J Wei, S Liu, B Li, X Tang, Y Lu, C Liu, M Hua, Z Zhang, G Tang, KJ Chen IEEE Electron Device Letters 36 (12), 1287-1290, 2015 | 91 | 2015 |
Low ON-resistance SiC trench/planar MOSFET with reduced OFF-state oxide field and low gate charges J Wei, M Zhang, H Jiang, CH Cheng, KJ Chen IEEE Electron Device Letters 37 (11), 1458-1461, 2016 | 88 | 2016 |
Normally-Off LPCVD-SiNx/GaN MIS-FET With Crystalline Oxidation Interlayer M Hua, J Wei, G Tang, Z Zhang, Q Qian, X Cai, N Wang, KJ Chen IEEE Electron Device Letters 38 (7), 929-932, 2017 | 85 | 2017 |
Impact of substrate bias polarity on buffer-related current collapse in AlGaN/GaN-on-Si power devices S Yang, C Zhou, S Han, J Wei, K Sheng, KJ Chen IEEE Transactions on Electron Devices 64 (12), 5048-5056, 2017 | 82 | 2017 |
Dynamic degradation in SiC trench MOSFET with a floating p-shield revealed with numerical simulations J Wei, M Zhang, H Jiang, H Wang, KJ Chen IEEE Transactions on Electron Devices 64 (6), 2592-2598, 2017 | 79 | 2017 |
650-V double-channel lateral Schottky barrier diode with dual-recess gated anode J Lei, J Wei, G Tang, Z Zhang, Q Qian, Z Zheng, M Hua, KJ Chen IEEE Electron Device Letters 39 (2), 260-263, 2017 | 69 | 2017 |
SiC MOSFET with built-in SBD for reduction of reverse recovery charge and switching loss in 10-kV applications H Jiang, J Wei, X Dai, C Zheng, M Ke, X Deng, Y Sharma, I Deviny, ... 2017 29th International Symposium on Power Semiconductor Devices and IC's …, 2017 | 66 | 2017 |
SiC trench MOSFET with shielded fin-shaped gate to reduce oxide field and switching loss H Jiang, J Wei, X Dai, M Ke, I Deviny, P Mawby IEEE electron device letters 37 (10), 1324-1327, 2016 | 65 | 2016 |
Identification of trap states in p-GaN layer of a p-GaN/AlGaN/GaN power HEMT structure by deep-level transient spectroscopy S Yang, S Huang, J Wei, Z Zheng, Y Wang, J He, KJ Chen IEEE Electron Device Letters 41 (5), 685-688, 2020 | 62 | 2020 |
GaN power IC technology on p-GaN gate HEMT platform J Wei, G Tang, R Xie, KJ Chen Japanese Journal of Applied Physics 59 (SG), SG0801, 2020 | 59 | 2020 |
Silicon carbide split-gate MOSFET with merged Schottky barrier diode and reduced switching loss H Jiang, J Wei, X Dai, M Ke, C Zheng, I Deviny 2016 28th International Symposium on Power Semiconductor Devices and ICs …, 2016 | 56 | 2016 |
Proposal of a GaN/SiC hybrid field-effect transistor for power switching applications J Wei, H Jiang, Q Jiang, KJ Chen IEEE Transactions on Electron Devices 63 (6), 2469-2473, 2016 | 56 | 2016 |
Electric field distribution around drain-side gate edge in AlGaN/GaN HEMTs: Analytical approach J Si, J Wei, W Chen, B Zhang IEEE transactions on electron devices 60 (10), 3223-3229, 2013 | 56 | 2013 |
Enhancement-mode GaN double-channel MOS-HEMT with low on-resistance and robust gate recess J Wei, S Liu, B Li, X Tang, Y Lu, C Liu, M Hua, Z Zhang, G Tang, KJ Chen 2015 IEEE International Electron Devices Meeting (IEDM), 9.4. 1-9.4. 4, 2015 | 55 | 2015 |