关注
JEERU DINESH REDDY
JEERU DINESH REDDY
BMSCE and NITK
在 bmsce.ac.in 的电子邮件经过验证
标题
引用次数
引用次数
年份
Design and modelling an attack on multiplexer based physical unclonable function
AM Venkata, DR Jeeru
arXiv preprint arXiv:2007.09032, 2020
12020
Implementation of Enhanced Parallel port interface for Frequency analysis in a configurable Ring Oscillator PUF circuits on Xilinx Spartan 3E architecture
DR Jeeru, KP Vittal, HVU Anikethan, AS Kumar
2019 IEEE International Conference on Electronics, Computing and …, 2019
12019
Scan Chain Stitching based on Logic Topology for Test-Power Reduction under Routing Constraint
A Reddy, JD Reddy
International Journal of Current Science Research and Review 5 (Issue 09 …, 2022
2022
Design And Modelling An Attack on Multiplexer Based Physical Unclonable Function
A Manchikanti Venkata, D Reddy Jeeru
arXiv e-prints, arXiv: 2007.09032, 2020
2020
Memory Controllers: A comparative study of SDRAM and DDR SDRAM Controller
NC Pavankumar, JD Reddy
2019
Domino CMOS Implementation of Power Optimized and High Performance CLA adder
KK Reddy, JD Reddy
2018
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