Dr. Shiromani Balmukund Rahi 个人学术档案

引用次数

	总计	2019 年至今
引用	660	592
h 指数	15	15
i10 指数	23	23

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20152016201720182019202020212022202320249 14 14 25 63 52 65 117 192 82

合著作者

Shubham TayalSynopsys India Pvt. Ltd., Hyderabad在 nitkkr.ac.in 的电子邮件经过验证
Young Suh SongDepartment of Electrical and Computer Engineering, Seoul National University在 snu.ac.kr 的电子邮件经过验证
Abhishek UpadhyayX-FAB Dresden GmbH & Co. KG在 xfab.com 的电子邮件经过验证
Billel SmaaniCentre Universitaire Abdelhafid Boussouf - Mila在 centre-univ-mila.dz 的电子邮件经过验证
Shoubhik GuptaInfineon Technologies, Austria在 infineon.com 的电子邮件经过验证
Samir Labiod在 univ-skikda.dz 的电子邮件经过验证
Yogesh GoswamiIndian Institute of Technology Kanpur在 iitkalumni.org 的电子邮件经过验证
Suman Lata TripathiProfessor, Lovely Professional University在 lpu.co.in 的电子邮件经过验证
Arun SamuelNational Engineering College在 nec.edu.in 的电子邮件经过验证
Dr. J. AjayanProfessor & Dean Post Graduation Programs, SR University, Telangana在 sru.edu.in 的电子邮件经过验证
Neha ParasJawaharlal Nehru University在 mail.jnu.ac.in 的电子邮件经过验证
Byung Gook ParkProfessor of Electrical Engineering, Seoul National University在 snu.ac.kr 的电子邮件经过验证
Dr.Sandip BhattacharyaProfessor & Head, ECE, SR University, PDF from HiSIM Research Center, Hiroshima University, 🗾在 sru.edu.in 的电子邮件经过验证
Jang Hyun KimAjou University在 ajou.ac.kr 的电子邮件经过验证
Dr. BISWAJIT JENAVellore Institute of Technology - VIT Chennai在 vit.ac.in 的电子邮件经过验证
Dr. Deepak KumarTechnische Universität Dresden — TU Dresden, Germany在 tu-dresden.de 的电子邮件经过验证
Shibir BasakM.Tech from Dept. of Elect. Engg., Indian Institute of Technology, Kanpur在 iitk.ac.in 的电子邮件经过验证
Dr. Chandan Kumar PandeyAssistant Professor (School of Electronics Engineering), VIT-AP University在 vitap.ac.in 的电子邮件经过验证
I.Vivek Anand ECE在 nec.edu.in 的电子邮件经过验证
Dr. Parvez Ahmad AlviAssociate Professor & Head, Department of Physical Science, Banasthali University, Rajasthan (INDIA)在 banasthali.in 的电子邮件经过验证

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Dr. Shiromani Balmukund Rahi

在 iitk.ac.in 的电子邮件经过验证 - 首页

Semiconductor Device Modeling &Simulations Tunnel FET NCFET Nanosheet FETs


标题按引用次数排序按年份排序按标题排序	引用次数引用次数	年份
Heterogate junctionless tunnel field-effect transistor: future of low-power devices SB Rahi, P Asthana, S Gupta Journal of Computational Electronics 16, 30-38, 2017	70	2017
A review on emerging negative capacitance field effect transistor for low power electronics SB Rahi, S Tayal, AK Upadhyay Microelectronics Journal 116, 105242, 2021	53	2021
Temperature effect on hetero structure junctionless tunnel FET SB Rahi, B Ghosh, B Bishnoi Journal of semiconductors 36 (3), 034002, 2015	45	2015
Improved performance of a junctionless tunnel field effect transistor with a Si and SiGe heterostructure for ultra low power applications PK Asthana, Y Goswami, S Basak, SB Rahi, B Ghosh RSC Advances 5 (60), 48779-48785, 2015	40	2015
High-k double gate junctionless tunnel FET with a tunable bandgap SB Rahi, B Ghosh RSC Advances 5 (67), 54544-54550, 2015	37	2015
Recent progress on negative capacitance tunnel FET for low-power applications: Device perspective AK Upadhyay, SB Rahi, S Tayal, YS Song Microelectronics Journal 129, 105583, 2022	35	2022
Identifying the moderating effect of trust on the adoption of cloud‐based services SB Rahi, S Bisui, SC Misra International Journal of Communication Systems 30 (11), e3253, 2017	34	2017
Optimal design for a high performance H-JLTFET using HfO 2 as a gate dielectric for ultra low power applications PK Asthana, B Ghosh, SBM Rahi, Y Goswami RSC Advances 4 (43), 22803-22807, 2014	34	2014
A simulation-based proposed high-k heterostructure AlGaAs/Si junctionless n-type tunnel FET SB Rahi, B Ghosh, P Asthana Journal of semiconductors 35 (11), 114005, 2014	29	2014
Incorporating bottom-up approach into device/circuit co-design for SRAM-based cache memory applications S Tayal, B Smaani, SB Rahi, AK Upadhyay, S Bhattacharya, J Ajayan, ... IEEE Transactions on Electron Devices 69 (11), 6127-6132, 2022	23	2022
Identifying critical challenges in the adoption of cloud‐based services SB Rahi, S Bisui, SC Misra International Journal of Communication Systems 30 (12), e3261, 2017	23	2017
Rigorous study of double gate tunneling field effect transistor structure based on silicon N Guenifi, SB Rahi, T Ghodbane Materials Focus 7 (6), 866-872, 2018	20	2018
Performance evaluation of gate engineered InAs–Si heterojunction surrounding gate TFET M Sathishkumar, TSA Samuel, K Ramkumar, IV Anand, SB Rahi Superlattices and Microstructures 162, 107099, 2022	19	2022
Suppression of Ambipolar Current and Analysis of RF Performance in Double Gate Tunneling Field Effect Transistors for Low-Power Applications SBRML N Guenifi International Journal of Nanoparticles and Nanotechnology 6 (1), 1-12, 2020	19	2020
Thermal-aware IC chip design by combining high thermal conductivity materials and GAA MOSFET YS Song, S Tayal, SB Rahi, JH Kim, AK Upadhyay, BG Park 2022 5th International Conference on Circuits, Systems and Simulation (ICCSS …, 2022	17	2022
Compact analytical model of double gate junction-less field effect transistor comprising quantum-mechanical effect S Gupta, B Ghosh, SB Rahi Journal of Semiconductors 36 (2), 024001, 2015	15	2015
Emerging low-power semiconductor devices: Applications for future technology nodes S Tayal, AK Upadhyay, D Kumar, SB Rahi CRC Press, 2022	14	2022
Performance evaluation of double gate tunnel FET based chain of inverters and 6-T SRAM cell D Kumar Engineering Research Express 1 (2), 025055, 2019	14	2019
Factors influencing the success of cloud adoption in the semiconductor industry SC Misra, SB Rahi, S Bisui, A Singh Software Quality Professional 21 (2), 38-51, 2019	14	2019
Low power circuit and system design hierarchy and thermal reliability of tunnel field effect transistor G Naima, SB Rahi Silicon, 1-11, 2021	13	2021

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