| Memory errors in modern systems: The good, the bad, and the ugly V Sridharan, N DeBardeleben, S Blanchard, KB Ferreira, J Stearley, ... ACM SIGARCH Computer Architecture News 43 (1), 297-310, 2015 | 386 | 2015 |
| A study of DRAM failures in the field V Sridharan, D Liberty SC'12: Proceedings of the International Conference on High Performance …, 2012 | 361 | 2012 |
| Feng shui of supercomputer memory: Positional effects in DRAM and SRAM faults V Sridharan, J Stearley, N DeBardeleben, S Blanchard, S Gurumurthi Proceedings of the International Conference on High Performance Computing …, 2013 | 240 | 2013 |
| Eliminating microarchitectural dependency from architectural vulnerability V Sridharan, DR Kaeli 2009 IEEE 15th International Symposium on High Performance Computer …, 2009 | 240 | 2009 |
| Balancing performance and reliability in the memory hierarchy GH Asadi, V Sridharan, MB Tahoori, D Kaeli IEEE International Symposium on Performance Analysis of Systems and Software …, 2005 | 131 | 2005 |
| Using hardware vulnerability factors to enhance AVF analysis V Sridharan, DR Kaeli ACM SIGARCH Computer Architecture News 38 (3), 461-472, 2010 | 110 | 2010 |
| Real-world design and evaluation of compiler-managed GPU redundant multithreading J Wadden, A Lyashevsky, S Gurumurthi, V Sridharan, K Skadron ACM SIGARCH Computer Architecture News 42 (3), 73-84, 2014 | 109 | 2014 |
| Design and Analysis of an APU for Exascale Computing T Vijayaraghavan, Y Eckert, GH Loh, MJ Schulte, M Ignatowski, ... 2017 IEEE International Symposium on High Performance Computer Architecture …, 2017 | 102 | 2017 |
| XED: Exposing on-die error detection information for strong memory reliability PJ Nair, V Sridharan, MK Qureshi ACM SIGARCH Computer Architecture News 44 (3), 341-353, 2016 | 95 | 2016 |
| Low-power, low-storage-overhead chipkill correct via multi-line error correction X Jian, H Duwe, J Sartori, V Sridharan, R Kumar Proceedings of the International Conference on High Performance Computing …, 2013 | 75 | 2013 |
| Reducing data cache susceptibility to soft errors V Sridharan, H Asadi, MB Tahoori, D Kaeli IEEE Transactions on Dependable and Secure Computing 3 (4), 353-364, 2006 | 73 | 2006 |
| Quantifying software vulnerability V Sridharan, DR Kaeli Proceedings of the 2008 Workshop on Radiation effects and fault tolerance in …, 2008 | 72 | 2008 |
| Resilient die-stacked DRAM caches J Sim, GH Loh, V Sridharan, M O'Connor ACM SIGARCH Computer Architecture News 41 (3), 416-427, 2013 | 70 | 2013 |
| Vulnerability analysis of L2 cache elements to single event upsets H Asadi, V Sridharan, MB Tahoori, D Kaeli Proceedings of the Design Automation & Test in Europe Conference 1, 1-6, 2006 | 68 | 2006 |
| Detecting and correcting hard errors in a memory array J Kalamatianos, JK John, R Gelinas, VK Sridharan, PE Nevius US Patent 9,189,326, 2015 | 59 | 2015 |
| Calculating architectural vulnerability factors for spatial multi-bit transient faults M Wilkening, V Sridharan, S Li, F Previlon, S Gurumurthi, DR Kaeli 2014 47th Annual IEEE/ACM International Symposium on Microarchitecture, 293-305, 2014 | 57 | 2014 |
| Lessons learned from memory errors observed over the lifetime of Cielo S Levy, KB Ferreira, N DeBardeleben, T Siddiqua, V Sridharan, ... SC18: International Conference for High Performance Computing, Networking …, 2018 | 43 | 2018 |
| Reliability-aware data placement for heterogeneous memory architecture M Gupta, V Sridharan, D Roberts, A Prodromou, A Venkat, D Tullsen, ... 2018 IEEE International Symposium on High Performance Computer Architecture …, 2018 | 41 | 2018 |
| Spare memory external to protected memory GH Loh, V Sridharan, JM O'connor US Patent 9,406,403, 2016 | 40 | 2016 |
| Compiler techniques to reduce the synchronization overhead of gpu redundant multithreading M Gupta, D Lowell, J Kalamatianos, S Raasch, V Sridharan, D Tullsen, ... Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017 | 37 | 2017 |
