| Sesam: An mpsoc simulation environment for dynamic application processing N Ventroux, A Guerre, T Sassolas, L Moutaoukil, G Blanc, C Bechara, ... 2010 10th IEEE International Conference on Computer and Information …, 2010 | 50 | 2010 |
| SESAM/Par4All: a tool for joint exploration of MPSoC architectures and dynamic dataflow code generation N Ventroux, T Sassolas, A Guerre, B Creusillet, R Keryell Proceedings of the 2012 Workshop on Rapid Simulation and Performance …, 2012 | 29 | 2012 |
| Hierarchical network-on-chip for embedded many-core architectures A Guerre, N Ventroux, R David, A Merigot 2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip, 189-196, 2010 | 24 | 2010 |
| HARS: A hardware-assisted runtime software for embedded many-core architectures Y Lhuillier, M Ojail, A Guerre, JM Philippe, KB Chehida, F Thabet, ... ACM Transactions on Embedded Computing Systems (TECS) 13 (3s), 1-25, 2014 | 17 | 2014 |
| Approximate-timed transactional level modeling for mpsoc exploration: A network-on-chip case study A Guerre, N Ventroux, R David, A Merigot 2009 12th Euromicro Conference on Digital System Design, Architectures …, 2009 | 13 | 2009 |
| Parallel architecture benchmarking: From embedded computing to hpc, a fips project perspective Y Lhuillier, JM Philippe, A Guerre, M Kierzynka, A Oleksia 2014 12th IEEE International Conference on Embedded and Ubiquitous Computing …, 2014 | 11 | 2014 |
| Artm: A lightweight fork-join framework for many-core embedded systems M Ojail, R David, Y Lhuillier, A Guerre 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2013 | 11 | 2013 |
| SESAM extension for fast MPSoC architectural exploration and dynamic streaming applications N Ventroux, T Sassolas, R David, G Blanc, A Guerre, C Bechara 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, 341-346, 2010 | 8 | 2010 |
| Blockgraph proof-of-concept DC Morales, P Velloso, A Guerre, TMT Nguyen, G Pujolle, K Alagha, ... Proceedings of the SIGCOMM'21 Poster and Demo Sessions, 82-84, 2021 | 7 | 2021 |
| Approche hiérarchique pour la gestion dynamique des tâches et des communications dans les architectures massivement parallèles programmables A Guerre Paris 11, 2010 | 5 | 2010 |
| Early design stage thermal evaluation and mitigation: The locomotiv architectural case T Sassolas, C Sandionigi, A Guerre, A Aminot, P Vivet, H Boussetta, ... 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-2, 2014 | 3 | 2014 |
| A unified methodology for a fast benchmarking of parallel architecture A Guerre, JT Acquaviva, Y Lhuillier 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-4, 2014 | 3 | 2014 |
| Method and device for assisting with code optimisation and parallelisation A Guerre, Y Lhuillier, J Aquaviva US Patent App. 15/126,820, 2017 | 2 | 2017 |
| A simulation framework for rapid prototyping and evaluation of thermal mitigation techniques in many-core architectures T Sassolas, C Sandionigi, A Guerre, J Mottin, P Vivet, H Boussetta, ... 2015 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2015 | 2 | 2015 |
| PACHA: Low cost bare metal development for shared memory manycore accelerators A Aminot, A Guerre, J Peeters, Y Lhuillier Procedia Computer Science 18, 1644-1653, 2013 | 2 | 2013 |
| Blockgraph: une Structure de Type Blockchain Tolérante aux Partitions pour les MANET DAC Morales, P Braconnot-Velloso, A Guerre, G Pujolle, K Al Agha, ... RESSI 2022: Rendez-vous de la Recherche et de l'Enseignement de la Sécurité …, 2022 | | 2022 |
| SESAM: AVirtual Prototyping Solution to Design Multicore Architectures Andriamisaina N Ventroux, T Sassolas, A Guerre Multicore Technology, 87-130, 2018 | | 2018 |
| Exploration de mécanismes de communication pour architectures paralleles embarquées A Guerre, N Ventroux, R David, A Mérigot | | |
