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Javier Diaz-Fortuny
Javier Diaz-Fortuny
在 imec.be 的电子邮件经过验证
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New weighted time lag method for the analysis of random telegraph signals
J Martin-Martinez, J Diaz, R Rodriguez, M Nafria, X Aymerich
IEEE Electron Device Letters 35 (4), 479-481, 2014
762014
A Versatile CMOS Transistor Array IC for the Statistical Characterization of Time-Zero Variability, RTN, BTI, and HCI
MN Javier Diaz-Fortuny, Javier Martin-Martinez, Rosana Rodriguez, Rafael ...
IEEE Journal of Solid-State Circuits, 1-13, 2018
41*2018
Analysis of Set and Reset mechanisms in Ni/HfO2-based RRAM with fast ramped voltages
M Maestro, J Martin-Martinez, J Diaz, A Crespo-Yepes, MB Gonzalez, ...
Microelectronic Engineering 147, 176-179, 2015
282015
Flexible setup for the measurement of CMOS time-dependent variability with array-based integrated circuits
J Diaz-Fortuny, P Saraza-Canflanca, R Castro-Lopez, E Roca, ...
IEEE Transactions on Instrumentation and Measurement 69 (3), 853-864, 2019
262019
New high resolution Random Telegraph Noise (RTN) characterization method for resistive RAM
M Maestro, J Diaz, A Crespo-Yepes, MB Gonzalez, J Martin-Martinez, ...
Solid-State Electronics 115, 140-145, 2016
262016
TARS: A toolbox for statistical reliability modeling of CMOS devices
J Diaz-Fortuny, J Martín-Martínez, R Rodríguez, M Nafria, R Castro-López, ...
2017 14th International Conference on Synthesis, Modeling, Analysis and …, 2017
172017
A transistor array chip for the statistical characterization of process variability, RTN and BTI/CHC aging
J Diaz-Fortuny, J Martín-Martínez, R Rodríguez, M Nafria, R Castro-López, ...
2017 14th International Conference on Synthesis, Modeling, Analysis and …, 2017
152017
Characterization of random telegraph noise and its impact on reliability of SRAM sense amplifiers
J Martin-Martinez, J Diaz, R Rodríguez, M Nafria, X Aymerich, E Roca, ...
2014 5th European Workshop on CMOS Variability (VARI), 1-6, 2014
142014
A robust and automated methodology for the analysis of Time-Dependent Variability at transistor level
P Saraza-Canflanca, J Diaz-Fortuny, R Castro-López, E Roca, ...
Integration 72, 13-20, 2020
122020
A model parameter extraction methodology including time-dependent variability for circuit reliability simulation
J Diaz-Fortuny, P Saraza-Canflanca, A Toro-Frías, R Castro-López, ...
2018 15th International Conference on Synthesis, Modeling, Analysis and …, 2018
122018
A ring-oscillator-based degradation monitor concept with tamper detection capability
J Diaz-Fortuny, P Saraza-Canflanca, E Bury, M Vandemaele, B Kaczer, ...
2022 IEEE International Reliability Physics Symposium (IRPS), 1-7, 2022
112022
Weighted time lag plot defect parameter extraction and GPU-based BTI modeling for BTI variability
VM Van Santen, J Diaz-Fortuny, H Amrouch, J Martin-Martinez, ...
2018 IEEE International Reliability Physics Symposium (IRPS), P-CR. 6-1-P-CR …, 2018
112018
Modeling and Understanding the Compact Performance of h‐BN Dual‐Gated ReS2 Transistor
K Lee, J Choi, B Kaczer, A Grill, JW Lee, S Van Beek, E Bury, ...
Advanced Functional Materials 31 (23), 2100625, 2021
102021
A smart noise-and RTN-removal method for parameter extraction of CMOS aging compact models
J Diaz-Fortuny, J Martin-Martinez, R Rodriguez, R Castro-Lopez, E Roca, ...
Solid-State Electronics 159, 99-105, 2019
92019
Design considerations of an SRAM array for the statistical validation of time-dependent variability models
P Saraza-Canflanca, D Malagon, F Passos, A Toro, J Núñez, ...
2018 15th International Conference on Synthesis, Modeling, Analysis and …, 2018
92018
A new time efficient methodology for the massive characterization of RTN in CMOS devices
G Pedreira, J Martín-Martínez, J Diaz-Fortuny, P Saraza-Canflanca, ...
2019 IEEE International Reliability Physics Symposium (IRPS), 1-5, 2019
82019
New method for the automated massive characterization of Bias Temperature Instability in CMOS transistors
P Saraza-Canflanca, J Diaz-Fortuny, R Castro-López, E Roca, ...
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 150-155, 2019
82019
Statistical threshold voltage shifts caused by BTI and HCI at nominal and accelerated conditions
J Diaz-Fortuny, P Saraza-Canflanca, R Rodriguez, J Martin-Martinez, ...
Solid-State Electronics 185, 108037, 2021
62021
TiDeVa: a toolbox for the automated and robust analysis of Time-Dependent Variability at transistor level
P Saraza-Canflanca, J Diaz-Fortuny, R Castro-López, E Roca, ...
2019 16th International Conference on Synthesis, Modeling, Analysis and …, 2019
62019
A noise and RTN-removal smart method for parameters extraction of CMOS aging compact models
J Diaz-Fortuny, J Martin-Martinez, R Rodriguez, M Nafria, R Castro-Lopez, ...
2018 Joint International EUROSOI Workshop and International Conference on …, 2018
62018
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