| Some contributions to synthesis and implementation of multifunctional registers A Valachi, M Timis, M Danubianu Proceedings of the 2nd WSEAS International Conference on Multivariate …, 2009 | 19 | 2009 |
| Improvement of FSM Synthesis using MSI and LSI Circuits A Valachi, R Silion, M Timis 8th International Symposium on Automatic Control and Computer Science, Iasi, 2004 | 10 | 2004 |
| Orders Priorities Settings Criteria for Multifunctional Registers A Valachi, M Timis, B Aignatoaie, S Tarcau Elektronika ir Elektrotechnika 100 (4), 87-90, 2010 | 6 | 2010 |
| SYNTHESIS OF THE ASYNCHRONOUS DIGITAL SYSTEMS USING THE IMPROOVED LOCALLY CLOCK METHOD. Technical University „Gh. Asachi” Iasi M TIMIS, A Valachi Automatic Control and Computer Science Faculty, Computer Science departament …, 2007 | 5 | 2007 |
| Synthesis of Digital Systems Implemented with Programmable Logic Devices, Using Decomposition Algorithms A VALACHI, M TIMIŞ, A BÂRLEANU, A STAN Bul. Inst. Polit. Iaşi 59 (2), 81-92, 2013 | 2 | 2013 |
| The comparative study of two analytical methods for detection and elimination of the static hazard in Combinational Logic Circuits A Valachi, BI Aignătoaiei, MG Timiş 15th International Conference on System Theory, Control and Computing, 1-4, 2011 | 2 | 2011 |
| Design of Log-Map/Max-Log-Map Decoder M Timis arXiv preprint arXiv:0903.4298, 2009 | 2 | 2009 |
| Optimal implementation of an integer divider using multifunctional registers with decoded control inputs A Valachi, MG Timis, CM Monor System Theory, Control and Computing (ICSTCC), 2015 19th International …, 2015 | 1 | 2015 |
| A Comparison between Coded-Decoded Mode Signals on Multifunctional Registers M TIMIS, A VALACHI, P CASCAVAL, R SILION 12th International Conference on Development and Application Systems …, 2014 | 1 | 2014 |
| Logical Function Decomposition Method for Synthesis of Digital Logical System Implemented with Programmable Logic Devices (PLD) MG Timis, A Valachi, A Barleanu, A Stan Circuits and Systems 4 (7), 472, 2013 | 1 | 2013 |
| Analytical Methods for Detecting and Eliminating the Static Hazard in Combinational Logic Circuits MG Timis, A Valachi, A Barleanu, A Stan BP International, 2024 | | 2024 |
| Synthesis of Digital Logical System by Using Logical Function Decomposition Algorithms implemented with PLD-Programmable Logic Devices MG Timis, A Valachi, A Barleanu, A Stan Research Updates in Mathematics and Computer Science, 80, 2024 | | 2024 |
| IMPROVEMENTS METHODS FOR DESIGN OF MULTIFUNCTIONAL REGISTERS WITH DECODED MODE SIGNALS M Timis, A Valachi, C Monor Scientific Research & Education in the Air Force-AFASES 2, 2015 | | 2015 |
| Two Analytical Methods for Detection and Elimination of the Static Hazard in Combinational Logic Circuits MG Timis, A Valachi, A Barleanu, A Stan Circuits and Systems 4 (7), 466, 2013 | | 2013 |
| TIMING COMPUTING IN ASYNCHRONOUS DIGITAL AUTOMATA M Timis, A Valachi Scientific Research & Education in the Air Force-AFASES 1, 2012 | | 2012 |
| Output Width Signal Control In Asynchronous Digital Systems Using Monostable Circuits M Timis arXiv preprint arXiv:0904.3714, 2009 | | 2009 |
| SYNTHESIS OF ASYNCHRONOUS DIGITAL SYSTEMS M TIMIS, A Valachi Transilvania University Press of Braşov, 2009 | | 2009 |
| A new method of analysis and synthesis of asynchronous sequential circuits M TIMIŞ Technical University of Moldova, 2005 | | 2005 |
| NEW DESIGN METHOD FOR ASYNCHRONOUS DIGITAL SYSTEMS M TIMIS, A VALACHI | | |
| Buletinul Institutului Politehnic din Iaşi Tome LIX (LXIII) Fasc. 2, 2013 AUTOMATIC CONTROL and COMPUTER SCIENCE Section A Alexandrescu, H Costin, C Rotariu, O Geman, I Petrila, V ion Manta, ... Synthesis 69, 80, 0 | | |
Alexandru BarleanuAssistant Professor,"Gheorghe Asachi" Technical University of Iaşi, Romania在 cs.tuiasi.ro 的电子邮件经过验证
