Submodular functions and electrical networks H Narayanan Elsevier, 1997 | 209 | 1997 |
FPGA based high performance double-precision matrix multiplication VBY Kumar, S Joshi, SB Patkar, H Narayanan International journal of parallel programming 38, 322-338, 2010 | 83 | 2010 |
The principal lattice of partitions of a submodular function H Narayanan Linear Algebra and its Applications 144, 179-216, 1991 | 48 | 1991 |
Randomized parallel algorithms for matroid union and intersection, with applications to arborescences and edge-disjoint spanning trees H Narayanan, H Saran, VV Vazirani SIAM Journal on Computing 23 (2), 387-397, 1994 | 43 | 1994 |
Theory of matroids and network analysis H Narayanan Ph. D Thesis, Department of Electrical Engineering, Indian Institute of …, 1974 | 42 | 1974 |
Decomposition of finite state machines for area, delay minimization RS Shelar, MP Desai, H Narayanan Proceedings 1999 IEEE International Conference on Computer Design: VLSI in …, 1999 | 30 | 1999 |
A state assignment scheme targeting performance and area BNVM Gupta, H Narayanan, MP Desai Proceedings Twelfth International Conference on VLSI Design.(Cat. No …, 1999 | 29 | 1999 |
Approximation algorithms for min-k-overlap problems using the principal lattice of partitions approach H Narayanan, S Roy, S Patkar Journal of Algorithms 21 (2), 306-330, 1996 | 28 | 1996 |
Topological transformations of electrical networks H Narayanan International journal of circuit theory and applications 15 (3), 211-233, 1987 | 24 | 1987 |
An elementary approach to the principal partition of a matroid H NARAYANAN, MN VARTAK IEICE TRANSACTIONS (1976-1990) 64 (4), 227-234, 1981 | 23 | 1981 |
On molecular and atomic matroids H Narayanan, MN Vartak Combinatorics and Graph Theory: Proceedings of the Symposium Held at the …, 1981 | 23 | 1981 |
Orthogonal partitioning and gated clock architecture for low power realization of FSMs RS Shelar, H Narayanan, MP Desai Proceedings of 13th Annual IEEE International ASIC/SOC Conference (Cat. No …, 2000 | 22 | 2000 |
Solution of Partial Differential Equations by electrical analogy YD Save, H Narayanan, SB Patkar Journal of Computational Science 2 (1), 18-30, 2011 | 21 | 2011 |
An efficient practical heuristic for good ratio-cut partitioning SB Patkar, H Narayanan 16th International Conference on VLSI Design, 2003. Proceedings., 64-69, 2003 | 21 | 2003 |
A rounding technique for the polymatroid membership problem H Narayanan Linear algebra and its applications 221, 41-57, 1995 | 20 | 1995 |
Improving graph partitions using submodular functions SB Patkar, H Narayanan Discrete Applied Mathematics 131 (2), 535-553, 2003 | 18 | 2003 |
On the decomposition of vector spaces H Narayanan Linear algebra and its applications 79, 61-98, 1986 | 17 | 1986 |
Some applications of an Implicit Duality Theorem to connections of structures of special types including Dirac and reciprocal structures H Narayanan Systems & Control Letters 45 (2), 87-95, 2002 | 16 | 2002 |
A note on the minimization of symmetric and general submodular functions H Narayanan Discrete Applied Mathematics 131 (2), 513-522, 2003 | 14 | 2003 |
Efficient DC analysis of RVJ circuits for moment and derivative computations of interconnect networks SH Batterywala, H Narayanan Proceedings Twelfth International Conference on VLSI Design.(Cat. No …, 1999 | 14 | 1999 |