关注
Leonardo Rezende Juracy
Leonardo Rezende Juracy
在 acad.pucrs.br 的电子邮件经过验证
标题
引用次数
引用次数
年份
A high-level modeling framework for estimating hardware metrics of CNN accelerators
LR Juracy, MT Moreira, A de Morais Amory, AF Hampel, FG Moraes
IEEE Transactions on Circuits and Systems I: Regular Papers 68 (11), 4783-4795, 2021
92021
Optimized design of an LSSD scan cell
LR Juracy, MT Moreira, FA Kuentzer, A de Morais Amory
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (2), 765-768, 2016
92016
On the reuse of timing resilient architecture for testing path delay faults in critical paths
FA Kuentzer, LR Juracy, AM Amory
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 379-384, 2018
82018
From cnn to dnn hardware accelerators: A survey on design, exploration, simulation, and frameworks
LR Juracy, R Garibotti, FG Moraes
Foundations and Trends® in Electronic Design Automation 13 (4), 270-344, 2023
72023
A fast, accurate, and comprehensive PPA estimation of convolutional hardware accelerators
LR Juracy, A de Morais Amory, FG Moraes
IEEE Transactions on Circuits and Systems I: Regular Papers 69 (12), 5171-5184, 2022
72022
A survey of aging monitors and reconfiguration techniques
LR Juracy, MT Moreira, AM Amory, FG Moraes
arXiv preprint arXiv:2007.07829, 2020
62020
An LSSD compliant scan cell for flip-flops
LR Juracy, MT Moreira, FA Kuentzer, FG Moraes, AM Amory
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018
62018
A fast runtime fault recovery approach for NoC-based MPSoCS for performance constrained applications
E Wachter, A Erichsen, L Juracy, A Amory, FG Moraes
Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 1-7, 2014
62014
Runtime fault recovery protocol for NoC-based MPSoCs
E Wächter, A Erichsen, L Juracy, A Amory, F Moraes
Fifteenth International Symposium on Quality Electronic Design, 132-139, 2014
52014
A comprehensive evaluation of convolutional hardware accelerators
LR Juracy, AM Amory, FG Moraes
IEEE Transactions on Circuits and Systems II: Express Briefs 70 (3), 1149-1153, 2022
42022
A TensorFlow and system simulator integration approach to estimate hardware metrics of convolution accelerators
LR Juracy, MT Moreira, AM Amory, FG Moraes
2021 IEEE 12th Latin America Symposium on Circuits and System (LASCAS), 1-4, 2021
42021
A DFT insertion methodology to scannable q-flop elements
LR Juracy, MT Moreira, FA Kuentzer, AM Amory
IEEE transactions on very large scale integration (VLSI) systems 26 (8 …, 2018
42018
A framework for fast architecture exploration of convolutional neural network accelerators
LR Juracy
Pontifícia Universidade Católica do Rio Grande do Sul, 2022
32022
Test oriented design and layout generation of an asynchronous controller for the blade template
FA Kuentzer, LR Juracy, MT Moreira, AM Amory
2020 26th IEEE International Symposium on Asynchronous Circuits and Systems …, 2020
32020
Assessment and Optimization of 1D CNN Model for Human Activity Recognition
RS Reusch, LR Juracy, FG Moraes
2022 XII Brazilian Symposium on Computing Systems Engineering (SBESC), 1-7, 2022
22022
Testable error detection logic design applied to an asynchronous timing resilient template
FA Kuentzer, LR Juracy, MT Moreira, AM Amory
2018 31st Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2018
22018
XGT4: an industrial grade, open source tester for multi-gigabit networks
LR Juracy, FB Lazzarotto, D Pigatto, NLV Calazans, FG Moraes
2017 24th IEEE International Conference on Electronics, Circuits and Systems …, 2017
22017
Deploying Machine Learning in Resource-Constrained Devices for Human Activity Recognition
RS Reusch, LR Juracy, FG Moraes
2023 XIII Brazilian Symposium on Computing Systems Engineering (SBESC), 1-6, 2023
12023
Delay lines test method for the Blade Template
FA Kuentzer, LR Juracy, MT Moreira, AM Amory
arXiv preprint arXiv:1905.11218, 2019
12019
Deploying Human Activity Recognition in Embedded RISC-V Processors
WA Nunes, RS Reusch, L Luza, AE Dal Zotto, LR Juracy, FG Moraes
2024
系统目前无法执行此操作,请稍后再试。
文章 1–20