| An open-source scalable thermal and power controller for HPC processors G Bambini, R Balas, C Conficoni, A Tilli, L Benini, S Benatti, A Bartolini 2020 IEEE 38th International Conference on Computer Design (ICCD), 364-367, 2020 | 7 | 2020 |
| ControlPULP: A RISC-V on-chip parallel power controller for many-core HPC processors with FPGA-based hardware-in-the-loop power and thermal emulation A Ottaviano, R Balas, G Bambini, A Del Vecchio, M Ciani, D Rossi, ... International Journal of Parallel Programming 52 (1), 93-123, 2024 | 3 | 2024 |
| ControlPULP: A RISC-V Power Controller for HPC Processors with Parallel Control-Law Computation Acceleration A Ottaviano, R Balas, G Bambini, C Bonfanti, S Benatti, D Rossi, L Benini, ... Embedded Computer Systems: Architectures, Modeling, and Simulation: 22nd …, 2022 | 3 | 2022 |
| Modeling the Thermal and Power Control Subsystem in HPC Processors G Bambini, C Conficoni, A Tilli, L Benini, A Bartolini 2022 IEEE Conference on Control Technology and Applications (CCTA), 397-402, 2022 | 2 | 2022 |
| Modeling and Controlling Many-Core HPC Processors: an Alternative to PID and Moving Average Algorithms G Bambini, A Ottaviano, C Conficoni, A Tilli, L Benini, A Bartolini arXiv preprint arXiv:2405.18030, 2024 | | 2024 |
Alessandro OttavianoPhD student, ETH Zurich在 iis.ee.ethz.ch 的电子邮件经过验证
Alessandro OttavianoPhD student, ETH Zurich在 iis.ee.ethz.ch 的电子邮件经过验证