| An Analytical Model of Single-Event Transients in Double-Gate MOSFET for Circuit Simulation YM Aneesh, SR Sriram, KR Pasupathy, B Bindu IEEE Transactions on Electron Devices 66 (9), 3710 -3717, 2019 | 19 | 2019 |
| A physics-based single event transient pulse width model for CMOS VLSI circuits YM Aneesh, B Bindu IEEE Transactions on Device and Materials Reliability 20 (4), 723-730, 2020 | 17 | 2020 |
| Design of carry select adder for low-power and high speed VLSI applications MVK Naik, M Aneesh Y 2015 IEEE International Conference on Electrical, Computer and Communication …, 2015 | 11 | 2015 |
| Low power and high speed row and column bypass multiplier KB Srinivas, YM Aneesh 2014 IEEE international conference on computational intelligence and …, 2014 | 8 | 2014 |
| A physics-based analytical model for single-event transients in an InGaAs n-channel FinFET suitable for circuit simulations YM Aneesh, B Bindu Journal of Computational Electronics 22 (1), 155-163, 2023 | 2 | 2023 |
| Design and Optimization of Double-Gate MOSFET to Reduce the Effects of Single Event Transients YM Aneesh, KR Pasupathy, B Bindu International Workshop on the Physics of Semiconductor and Devices, 583-588, 2017 | 1 | 2017 |
| Heart sound and abnormal heart sound detection method based on signal characteristic R Latha, A Sabanayagam, YM Aneesh International Journal of Mathematical Sciences and Engineering (IJMSE) 5 (2 …, 2017 | 1 | 2017 |
| Single Event Transient Effects in Raised Source/Drain Double-Gate 1-T DRAM YM Aneesh, B Bindu, A Asenov 2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM), 1-3, 2024 | | 2024 |
| Comparative Analysis of Single Event Transients in InGaAs-OI/Bulk/BOI FinFETs for SET-Tolerant InGaAs/Ge-OI Complementary FinFET Circuits YM Aneesh, B Bindu IETE Journal of Research, 1-9, 2023 | | 2023 |
| A simple statically reconfigurable processor architecture A Moosa, M Aneesh 2015 IEEE International Conference on Electrical, Computer and Communication …, 2015 | | 2015 |
| Design of Low Power Wide Gates used in Register File and Tag Comparator MA Isac Daimary | | |
Bindu BobyProfessor, Vellore Institute of Technology, Chennai在 vit.ac.in 的电子邮件经过验证
