| An ultra-fast parallel prefix adder KS Pandey, D Kumar, N Goel, H Shrimali 2019 IEEE 26th Symposium on Computer Arithmetic (ARITH), 125-134, 2019 | 19 | 2019 |
| Design of hybrid flash-SAR ADC using an inverter based comparator in 28 nm CMOS D Kumar, SK Pandey, N Gupta, H Shrimali Microelectronics Journal 95, 104666, 2020 | 16 | 2020 |
| A 6-bit, 29.56 fJ/Conv-Step, voltage scalable flash-sar hybrid ADC in 28 nm cmos BD Kumar, H Shrimali, N Gupta 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2019 | 7 | 2019 |
| Analysis of timing error due to supply and substrate noise in an inverter based high-speed comparator VK Sharma, BD Kumar, MS Illikkal, JN Tripathi, N Gupta, H Shrimali 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2019 | 5 | 2019 |
| Design and implementation of a second order PLL based frequency synthesizer for implantable medical devices D Kumar, H Shrimali Integration 86, 57-63, 2022 | 3 | 2022 |
| A Low-Power Quadrature LC-Oscillator Using Core-and-Coupling Current-Reuse D Kumar, H Shrimali, N Nallam 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2021 | 2 | 2021 |
| Design of a 0.52 mW− 141 dBc/Hz and 450 MHz frequency synthesizer using low power and low phase noise current reuse VCO BD Kumar, H Shrimali TENCON 2017-2017 IEEE Region 10 Conference, 2937-2912, 2017 | 2 | 2017 |
| A self-bandwidth switching & area-efficient PLL using multiplexer-controlled frequency selector BD Kumar, S Pandey, P Arora, R Shrestha 2017 7th International Symposium on Embedded Computing and System Design …, 2017 | 1 | 2017 |
Hitesh ShrimaliProfessor, IIT Mandi在 iitmandi.ac.in 的电子邮件经过验证
