| Two-layered falsification of hybrid systems guided by monte carlo tree search Z Zhang, G Ernst, S Sedwards, P Arcaini, I Hasuo IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 69 | 2018 |
| KIV: overview and VerifyThis competition G Ernst, J Pfähler, G Schellhorn, D Haneberg, W Reif International Journal on Software Tools for Technology Transfer 17, 677-694, 2015 | 65 | 2015 |
| Optimized java binary and virtual machine for tiny motes F Aslam, L Fennell, C Schindelhauer, P Thiemann, G Ernst, E Haussmann, ... Distributed Computing in Sensor Systems: 6th IEEE International Conference …, 2010 | 51 | 2010 |
| Introducing TakaTuka: a Java virtualmachine for motes F Aslam, C Schindelhauer, G Ernst, D Spyra, J Meyer, M Zalloom Proceedings of the 6th ACM conference on Embedded network sensor systems …, 2008 | 50 | 2008 |
| ARCH-COMP 2019 Category Report: Falsification. G Ernst, P Arcaini, A Donze, G Fainekos, L Mathesen, G Pedrielli, ... ARCH@ CPSIoTWeek, 129-140, 2019 | 46 | 2019 |
| Arch-comp 2020 category report: Falsification G Ernst, P Arcaini, I Bennani, A Donze, G Fainekos, G Frehse, L Mathesen, ... EPiC Series in Computing, 2020 | 45 | 2020 |
| The COST IC0701 verification competition 2011 T Bormer, M Brockschmidt, D Distefano, G Ernst, JC Filliâtre, R Grigore, ... Formal Verification of Object-Oriented Software: International Conference …, 2012 | 44 | 2012 |
| Fast falsification of hybrid systems using probabilistically adaptive input G Ernst, S Sedwards, Z Zhang, I Hasuo Quantitative Evaluation of Systems: 16th International Conference, QEST 2019 …, 2019 | 43 | 2019 |
| Development of a verified flash file system G Schellhorn, G Ernst, J Pfähler, D Haneberg, W Reif Abstract State Machines, Alloy, B, TLA, VDM, and Z: 4th International …, 2014 | 43 | 2014 |
| Interleaved programs and rely-guarantee reasoning with ITL G Schellhorn, B Tofan, G Ernst, W Reif 2011 Eighteenth International Symposium on Temporal Representation and …, 2011 | 43 | 2011 |
| Verification of a virtual filesystem switch G Ernst, G Schellhorn, D Haneberg, J Pfähler, W Reif Verified Software: Theories, Tools, Experiments: 5th International …, 2014 | 39 | 2014 |
| RGITL: A temporal logic framework for compositional reasoning about interleaved programs G Schellhorn, B Tofan, G Ernst, J Pfähler, W Reif Annals of Mathematics and Artificial Intelligence 71, 131-174, 2014 | 35 | 2014 |
| SecCSL: Security Concurrent Separation Logic G Ernst, T Murray Computer Aided Verification: 31st International Conference, CAV 2019, New …, 2019 | 30 | 2019 |
| ARCH-COMP 2021 Category Report: Falsification with Validation of Results. G Ernst, P Arcaini, I Bennani, A Chandratre, A Donzé, G Fainekos, ... ARCH@ ADHS, 133-152, 2021 | 29 | 2021 |
| Inside a verified flash file system: transactions and garbage collection G Ernst, J Pfähler, G Schellhorn, W Reif Verified Software: Theories, Tools, and Experiments: 7th International …, 2016 | 29 | 2016 |
| Modular, crash-safe refinement for ASMs with submachines G Ernst, J Pfähler, G Schellhorn, W Reif Science of Computer Programming 131, 3-21, 2016 | 24 | 2016 |
| ARCH-COMP18 Category Report: Results on the Falsification Benchmarks. A Dokhanchi, S Yaghoubi, B Hoxha, G Fainekos, G Ernst, Z Zhang, ... ARCH@ ADHS, 104-109, 2018 | 23 | 2018 |
| Legion: Best-first concolic testing D Liu, G Ernst, T Murray, BIP Rubinstein Proceedings of the 35th IEEE/ACM International Conference on Automated …, 2020 | 20 | 2020 |
| VerifyThis–verification competition with a human factor G Ernst, M Huisman, W Mostowski, M Ulbrich Tools and Algorithms for the Construction and Analysis of Systems: 25 Years …, 2019 | 20 | 2019 |
| Formal specification of an erase block management layer for flash memory J Pfähler, G Ernst, G Schellhorn, D Haneberg, W Reif Hardware and Software: Verification and Testing: 9th International Haifa …, 2013 | 20 | 2013 |
Jörg PfählerUniversität Augsburg在 isse.de 的电子邮件经过验证
