| Modified MAC unit for low power high speed DSP application using multipler with bypassing technique and optimized adders T Francis, T Joseph, JK Antony 2013 fourth international conference on computing, communications and …, 2013 | 24 | 2013 |
| Hardware realization of sigmoid and hyperbolic tangent activation functions S Konwer, M Sojan, PA Kenz, SK Santhosh, T Joseph, TS Bindiya 2022 IEEE International Conference on Industry 4.0, Artificial Intelligence …, 2022 | 4 | 2022 |
| High speed and power efficient multiplexer based matrix vector multiplication for LSTM network T Joseph, TS Bindiya 2021 25th International Symposium on VLSI Design and Test (VDAT), 1-4, 2021 | 2 | 2021 |
| Approximate Multiplier Design with LFSR-Based Stochastic Sequence Generators for Edge AI M Sasmal, T Joseph, TS Bindiya IEEE Computer Architecture Letters, 2024 | 1 | 2024 |
| Power and delay-efficient matrix vector multiplier units for the lstm networks using activity span reduction technique and recursive adders T Joseph, TS Bindiya Circuits, Systems, and Signal Processing 42 (12), 7494-7528, 2023 | 1 | 2023 |
| Performance-driven LSTM accelerator hardware using split-matrix-based MVM T Joseph, TS Bindiya Circuits, Systems, and Signal Processing 42 (11), 6660-6683, 2023 | 1 | 2023 |
| Realization and Hardware Implementation of Gating Units for Long Short Term Memory Network using Hyperbolic Sine Functions T Joseph, TS Bindiya IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023 | | 2023 |
