Neuromorphic computing with multi-memristive synapses I Boybat, ML Gallo, SR Nandakumar, T Moraitis, T Parnell, T Tuma, ... Nature communications, 2018 | 728 | 2018 |
Accurate deep neural network inference using computational phase-change memory V Joshi, M Le Gallo, S Haefeli, I Boybat, SR Nandakumar, C Piveteau, ... Nature communications 11 (1), 2473, 2020 | 397 | 2020 |
A phase-change memory model for neuromorphic computing SR Nandakumar, M Le Gallo, I Boybat, B Rajendran, A Sebastian, ... Journal of Applied Physics 124 (15), 2018 | 130 | 2018 |
A 250 mV Cu/SiO2/W Memristor with Half-Integer Quantum Conductance States SR Nandakumar, M Minvielle, S Nagar, C Dubourdieu, B Rajendran Nano letters 16 (3), 1602-1608, 2016 | 110 | 2016 |
HERMES Core–A 14nm CMOS and PCM-based In-Memory Compute Core using an array of 300ps/LSB Linearized CCO-based ADCs and local digital processing R Khaddam-Aljameh, M Stanisavljevic, JF Mas, G Karunaratne, ... 2021 Symposium on VLSI Circuits, 1-2, 2021 | 103 | 2021 |
Mixed-Precision Deep Learning Based on Computational Memory SR Nandakumar, M Le Gallo, C Piveteau, V Joshi, G Mariani, I Boybat, ... Frontiers in Neuroscience 14, 2020 | 97 | 2020 |
Mixed-precision architecture based on computational memory for training deep neural networks SR Nandakumar, M Le Gallo, I Boybat, B Rajendran, A Sebastian, ... 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018 | 74 | 2018 |
HERMES-Core—A 1.59-TOPS/mm2 PCM on 14-nm CMOS In-Memory Compute Core Using 300-ps/LSB Linearized CCO-Based ADCs R Khaddam-Aljameh, M Stanisavljevic, JF Mas, G Karunaratne, M Brändli, ... IEEE Journal of Solid-State Circuits 57 (4), 1027-1038, 2022 | 73 | 2022 |
Experimental demonstration of supervised learning in spiking neural networks with phase-change memory synapses SR Nandakumar, I Boybat, M Le Gallo, E Eleftheriou, A Sebastian, ... Scientific reports 10 (1), 1-11, 2020 | 72 | 2020 |
Computational memory-based inference and training of deep neural networks A Sebastian, I Boybat, M Dazzi, I Giannopoulos, V Jonnalagadda, V Joshi, ... 2019 Symposium on VLSI Technology, T168-T169, 2019 | 47 | 2019 |
Building brain-inspired computing systems: Examining the role of nanoscale devices SR Nandakumar, SR Kulkarni, AV Babu, B Rajendran IEEE Nanotechnology Magazine 12 (3), 19-35, 2018 | 44 | 2018 |
Hardware-aware training for large-scale and diverse deep learning inference workloads using in-memory computing-based accelerators MJ Rasch, C Mackin, M Le Gallo, A Chen, A Fasoli, F Odermatt, N Li, ... Nature communications 14 (1), 5282, 2023 | 39 | 2023 |
Optimised weight programming for analogue memory-based deep neural networks C Mackin, MJ Rasch, A Chen, J Timcheck, RL Bruce, N Li, P Narayanan, ... Nature communications 13 (1), 3765, 2022 | 32 | 2022 |
Deep learning acceleration based on in-memory computing E Eleftheriou, M Le Gallo, SR Nandakumar, C Piveteau, I Boybat, V Joshi, ... IBM Journal of Research and Development 63 (6), 7: 1-7: 16, 2019 | 31 | 2019 |
Supervised learning in spiking neural networks with MLC PCM synapses SR Nandakumar, I Boybat, M Le Gallo, A Sebastian, B Rajendran, ... 2017 75th Annual Device Research Conference (DRC), 1-2, 2017 | 29 | 2017 |
Precision of bit slicing with in-memory computing based on analog phase-change memory crossbars M Le Gallo, SR Nandakumar, L Ciric, I Boybat, R Khaddam-Aljameh, ... Neuromorphic Computing and Engineering 2 (1), 014009, 2022 | 27 | 2022 |
Mixed-precision training of deep neural networks using computational memory SR Nandakumar, M Le Gallo, I Boybat, B Rajendran, A Sebastian, ... arXiv preprint arXiv:1712.01192, 2017 | 25 | 2017 |
Phase-change memory models for deep learning training and inference SR Nandakumar, I Boybat, V Joshi, C Piveteau, M Le Gallo, B Rajendran, ... 2019 26th IEEE International Conference on Electronics, Circuits and Systems …, 2019 | 24 | 2019 |
Precision of synaptic weights programmed in phase-change memory devices for deep learning inference SR Nandakumar, I Boybat, JP Han, S Ambrogio, P Adusumilli, RL Bruce, ... 2020 IEEE International Electron Devices Meeting (IEDM), 29.4. 1-29.4. 4, 2020 | 21 | 2020 |
AnalogNets: ML-HW co-design of noise-robust TinyML models and always-on analog compute-in-memory accelerator C Zhou, FG Redondo, J Büchel, I Boybat, XT Comas, SR Nandakumar, ... arXiv preprint arXiv:2111.06503, 2021 | 18 | 2021 |