Three-dimensional 128 Gb MLC vertical NAND flash memory with 24-WL stacked layers and 50 MB/s high-speed programming KT Park, S Nam, D Kim, P Kwak, D Lee, YH Choi, MH Choi, DH Kwak, ... IEEE Journal of Solid-State Circuits 50 (1), 204-213, 2014 | 336 | 2014 |
7.2 A 128Gb 3b/cell V-NAND flash memory with 1Gb/s I/O rate JW Im, WP Jeong, DH Kim, SW Nam, DK Shim, MH Choi, HJ Yoon, ... 2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015 | 125 | 2015 |
A 128 Gb 3b/cell V-NAND flash memory with 1 Gb/s I/O rate W Jeong, J Im, DH Kim, SW Nam, DK Shim, MH Choi, HJ Yoon, DH Kim, ... IEEE Journal of Solid-State Circuits 51 (1), 204-212, 2015 | 79 | 2015 |
Nonvolatile memory device, programming method of nonvolatile memory device and memory system including nonvolatile memory device D Kwak, SW Park, J Won-Taeck US Patent 8,902,651, 2014 | 62 | 2014 |
30.3 A 512Gb 3b/Cell 7th -Generation 3D-NAND Flash Memory with 184MB/s Write Throughput and 2.0Gb/s Interface J Cho, DC Kang, J Park, SW Nam, JH Song, BK Jung, J Lyu, H Lee, ... 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 426-428, 2021 | 31 | 2021 |
Nonvolatile memory device and method of driving word line of the nonvolatile memory park sang-won US Patent 9,431,062, 2016 | 25 | 2016 |
Nonvolatile memory device and storage device including nonvolatile memory device L Bongsoon US Patent 10,658,040, 2020 | 17 | 2020 |
Nonvolatile memory devices, operating methods thereof and memory systems including the same SW Park, D Kang, JY Yun, J Han, CW Yoon US Patent 9,324,440, 2016 | 14 | 2016 |
Nonvolatile memory device SW Park, SC Jeon, DK Shim US Patent 10,102,909, 2018 | 10 | 2018 |
Nonvolatile memory device, vertical NAND flash memory device and SSD device including the same SW Park, SW Nam, BS Lim US Patent 10,804,293, 2020 | 7 | 2020 |
Non-volatile memory device including memory planes, and operating method thereof SC Jeon, SW Park, DK Shim, K Dong-Hun US Patent 10,712,955, 2020 | 7 | 2020 |
Nonvolatile memory device and method controlling word line setup time based on difference in setup voltage levels SW Park, D Shim, P Kitae, SW Shim US Patent 9,502,124, 2016 | 6 | 2016 |
Novel electrical detection method for random defects on peripheral circuits in NAND flash memory BI Nam, Y Choi, S Hong, KY Dong, W Jung, SW Park, SY Lee, D Jung, ... 2022 IEEE International Reliability Physics Symposium (IRPS), P40-1-P40-4, 2022 | 3 | 2022 |
Three-dimensional semiconductor memory device LIM Bongsoon, SW Nam, SW Park, SW Shim, H Jeon, Y Choi US Patent 11,515,325, 2022 | 2 | 2022 |
Non-volatile memory devices and methods of programming the same DK Shim, SW Park, SC Jeon US Patent 10,490,280, 2019 | 1 | 2019 |
Nonvolatile memory device SW Park, SC Jeon, DK Shim US Patent 10,395,741, 2019 | 1 | 2019 |
Nonvolatile memory device with controlled word line setup time SW Park, D Shim, P Kitae, SW Shim US Patent 10,388,367, 2019 | 1 | 2019 |
Three-dimensional semiconductor memory device LIM Bongsoon, SW Nam, SW Park, SW Shim, H Jeon, Y Choi US Patent 11,854,982, 2023 | | 2023 |
Three-dimensional semiconductor memory device LIM Bongsoon, SW Nam, SW Park, SW Shim, H Jeon, Y Choi US Patent 11,495,541, 2022 | | 2022 |
Non-volatile memory device and method for programming the same SW Park, SW Nam, JY Shin, WB Shim, JY Yun, JH Cho, SG Hong US Patent 11,322,205, 2022 | | 2022 |