Layout-induced stress effects on the performance and variation of FinFETs C Lee, HC Kang, JG Min, J Kim, U Kwon, KH Lee, Y Park 2015 International Conference on Simulation of Semiconductor Processes and …, 2015 | 7 | 2015 |
Progress in dislocation stress field model and its appications U Kwon, JG Min, SY Lee, A Schmidt, DS Kim, Y Kayama, Y Nishizawa, ... 2019 International Conference on Simulation of Semiconductor Processes and …, 2019 | 2 | 2019 |
The impact of dislocation on bulk-Si FinFET technologies: Physical modeling of strain relaxation and enhancement by dislocation JG Min, C Jeong, U Kwon, DS Kim, S Kim, I Kim, JS Yang 2018 IEEE 13th Nanotechnology Materials and Devices Conference (NMDC), 1-4, 2018 | 2 | 2018 |
Modeling of Re-Sputtering Induced Bridge of Tungsten Bit-Lines for NAND Flash Memory Cell with 37nm Node Technology B Hwang, Y Lee, JG Min, H Shin, N Lim, S Kim, WY Chung, TK Kim, ... Simulation of Semiconductor Processes and Devices 2007: SISPAD 2007, 45-48, 2007 | 1 | 2007 |
Yieldable digital twin for prediction of 3D FinFET manufacturability J Min Sungkyunkwan university, 2021 | | 2021 |
Smart Manufacturing Application in 3D FinFETs: New Approach for Performance-Yield Co-Optimization Based on Virtual Process Integration JG Min Journal of Nanoscience and Nanotechnology 21, 1862–1868, 2021 | | 2021 |
Intelligent MOL (Middle-Of-Line) Design Methodology for 3D FinFET Manufacturability JG Min Electrochemical and Solid State Science(ECS), 2020 | | 2020 |
Smart Manufacturing(SM) Application in 3D FinFETs: New Approach For Performance-Yield Co-optimization Based on Virtual Integration JG Min International Conference on Advanced Electromaterials, 2019 | | 2019 |
Modeling of stress-dependent wet etch characteristic for P-SOG STI process J Min, S Rha, T Kim, U Kwon, J Goo, Y Park, J Kong 2006 International Conference on Simulation of Semiconductor Processes and …, 2006 | | 2006 |