| DeepSniffer: A DNN Model Extraction Framework Based on Learning Architectural Hints X Hu, L Liang, S Li, L Deng, P Zuo, Y Ji, X Xie, Y Ding, C Liu, T Sherwood, ... Proceedings of the Twenty-Fifth International Conference on Architectural …, 2020 | 163* | 2020 |
| Analysis and Optimization of the Memory Hierarchy for Graph Processing Workloads A Basak, S Li, X Hu, SM Oh, X Xie, L Zhao, X Jiang, Y Xie 2019 IEEE International Symposium on High Performance Computer Architecture …, 2019 | 88 | 2019 |
| iPIM: Programmable In-Memory Image Processing Accelerator Using Near-Bank Architecture P Gu, X Xie, Y Ding, G Chen, W Zhang, D Niu, Y Xie 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture …, 2020 | 81 | 2020 |
| SpaceA: Sparse Matrix Vector Multiplication on Processing-in-Memory Accelerator X Xie, Z Liang, P Gu, A Basak, L Deng, L Liang, X Hu, Y Xie 2021 IEEE International Symposium on High-Performance Computer Architecture …, 2021 | 79 | 2021 |
| FPSA: A Full System Stack Solution for Reconfigurable ReRAM-based NN Accelerator Architecture Y Ji, Y Zhang, X Xie, S Li, P Wang, X Hu, Y Zhang, Y Xie Proceedings of the Twenty-Fourth International Conference on Architectural …, 2019 | 77 | 2019 |
| Hitnet: Hybrid ternary recurrent neural network P Wang, X Xie, L Deng, G Li, D Wang, Y Xie Advances in neural information processing systems 31, 2018 | 67 | 2018 |
| Rubik: A hierarchical architecture for efficient graph neural network training X Chen, Y Wang, X Xie, X Hu, A Basak, L Liang, M Yan, L Deng, Y Ding, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021 | 58* | 2021 |
| Communication optimization on GPU: a case study of sequence alignment algorithms J Wang, X Xie, J Cong 2017 IEEE International Parallel and Distributed Processing Symposium (IPDPS …, 2017 | 35 | 2017 |
| DLUX: A LUT-based near-bank accelerator for data center deep learning training workloads P Gu, X Xie, S Li, D Niu, H Zheng, KT Malladi, Y Xie IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020 | 31 | 2020 |
| QGAN: Quantized Generative Adversarial Networks P Wang, D Wang, Y Ji, X Xie, H Song, XX Liu, Y Lyu, Y Xie arXiv preprint arXiv:1901.08263, 2019 | 31 | 2019 |
| SEALing Neural Network Models in Encrypted Deep Learning Accelerators P Zuo, Y Hua, L Liang, X Xie, X Hu, Y Xie 2021 58th ACM/IEEE Design Automation Conference (DAC), 1255-1260, 2021 | 27* | 2021 |
| Exploiting sparsity to accelerate fully connected layers of cnn-based applications on mobile socs X Xie, D Du, Q Li, Y Liang, WT Tang, ZL Ong, M Lu, HP Huynh, RSM Goh ACM Transactions on Embedded Computing Systems (TECS) 17 (2), 1-25, 2017 | 25 | 2017 |
| SAGA-Bench: Software and Hardware Characterization of Streaming Graph Analytics Workloads A Basak, J Lin, R Lorica, X Xie, Z Chishti, A Alameldeen, Y Xie 2020 IEEE International Symposium on Performance Analysis of Systems and …, 2020 | 14 | 2020 |
| Memory-Bound Proof-of-Work Acceleration for Blockchain Applications K Wu, G Dai, X Hu, S Li, X Xie, Y Wang, Y Xie 2019 56th ACM/IEEE Design Automation Conference (DAC), 1-6, 2019 | 14 | 2019 |
| NNBench-X: Benchmarking and Understanding Neural Network Workloads for Accelerator Designs X Xie, X Hu, P Gu, S Li, Y Ji, Y Xie IEEE Computer Architecture Letters 18 (1), 38-42, 2019 | 8 | 2019 |
| A Transferable Approach for Partitioning Machine Learning Models on Multi-Chip-Modules X Xie, P Prabhu, U Beaugnon, P Phothilimthana, S Roy, A Mirhoseini, ... Proceedings of Machine Learning and Systems 4, 370-381, 2022 | 5 | 2022 |
| MPU: Towards Bandwidth-abundant SIMT Processor via Near-bank Computing X Xie, P Gu, Y Ding, D Niu, H Zheng, Y Xie arXiv preprint arXiv:2103.06653, 2021 | 5 | 2021 |
| MPU-Sim: A Simulator for In-DRAM Near-Bank Processing Architectures X Xie, P Gu, J Huang, Y Ding, Y Xie IEEE Computer Architecture Letters 21 (1), 1-4, 2021 | 3 | 2021 |
| NNBench-X: A Benchmarking Methodology for Neural Network Accelerator Designs X Xie, X Hu, P Gu, S Li, Y Ji, Y Xie ACM Transactions on Architecture and Code Optimization (TACO) 17 (4), 1-25, 2020 | 3 | 2020 |
| MPU: Memory-Centric SIMT Processor via In-DRAM Near-Bank Computing X Xie, P Gu, Y Ding, D Niu, H Zheng, Y Xie ACM Transactions on Architecture and Code Optimization, 2023 | 2 | 2023 |
Yuan XieChair Professor of Hong Kong University of Science and Technology (HKUST)在 ust.hk 的电子邮件经过验证
