关注
Chuan Yean Tan
Chuan Yean Tan
Software Engineer, Cadence Design Systems
在 purdue.edu 的电子邮件经过验证
标题
引用次数
引用次数
年份
Benchmark circuits for clock scheduling and synthesis
R Ewetz, S Janarthanan, CK Koh, CY Tan
142015
Clustering of flip-flops for useful-skew clock tree synthesis
CY Tan, R Ewetz, CK Koh
2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), 507-512, 2018
102018
Construction of latency-bounded clock trees
R Ewetz, CY Tan, CK Koh
Proceedings of the 2016 on International Symposium on Physical Design, 81-88, 2016
92016
Open Cortex-M0™ Modular Debug Unit
CY Tan, M Swabey
2013
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