| Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers J Cortadella, M Kishinevsky, A Kondratyev, L Lavagno, A Yakovlev IEICE Transactions on information and Systems 80 (3), 315-325, 1997 | 791 | 1997 |
| Deriving Petri nets from finite transition systems J Cortadella, M Kishinevsky, L Lavagno, A Yakovlev IEEE transactions on computers 47 (8), 859-882, 1998 | 348 | 1998 |
| Logic Synthesis for Asynchronous Controllers and Interfaces J Cortadella, M Kishinevsky, A Kondratyev, L Lavagno, A Yakovlev Springer, 2002 | 326* | 2002 |
| Desynchronization: Synthesis of asynchronous circuits from synchronous specifications J Cortadella, A Kondratyev, L Lavagno, CP Sotiriou IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006 | 285 | 2006 |
| Petri net analysis using boolean manipulation E Pastor, O Roig, J Cortadella, RM Badia International Conference on Application and Theory of Petri Nets, 416-435, 1994 | 247 | 1994 |
| Synthesis of synchronous elastic architectures J Cortadella, M Kishinevsky, B Grundmann Proceedings of the 43rd Annual Design Automation Conference, 657-662, 2006 | 205 | 2006 |
| Working-zone encoding for reducing the energy in microprocessor address buses E Musoll, T Lang, J Cortadella IEEE Transactions on Very Large Scale Integration (VLSI) Systems 6 (4), 568-572, 1998 | 188 | 1998 |
| High-level synthesis techniques for reducing the activity of functional units E Musoll, J Cortadella Proceedings of the 1995 international symposium on Low power design, 99-104, 1995 | 166 | 1995 |
| A region-based algorithm for discovering Petri nets from event logs J Carmona, J Cortadella, M Kishinevsky Business Process Management: 6th International Conference, BPM 2008, Milan …, 2008 | 158 | 2008 |
| Handshake protocols for de-synchronization I Blunno, J Cortadella, A Kondratyev, L Lavagno, K Lwin, C Sotiriou 10th International Symposium on Asynchronous Circuits and Systems, 2004 …, 2004 | 145 | 2004 |
| Elastic circuits J Carmona, J Cortadella, M Kishinevsky, A Taubin IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009 | 141 | 2009 |
| Verification of asynchronous circuits by BDD-based model checking of Petri nets O Roig, J Cortadella, E Pastor International Conference on Application and Theory of Petri Nets, 374-391, 1995 | 135 | 1995 |
| Synthesizing Petri nets from state-based models J Cortadella, M Kishinevsky, L Lavagno, A Yakovlev Proceedings of IEEE International Conference on Computer Aided Design (ICCAD …, 1995 | 129 | 1995 |
| Exploiting the locality of memory references to reduce the address bus energy E Musoll, T Lang, J Cortadella Proceedings of the 1997 international symposium on Low power electronics and …, 1997 | 122 | 1997 |
| Individual flip-flops with gated clocks for low power datapaths T Lang, E Musoll, J Cortadella IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 1997 | 120 | 1997 |
| The octahedron abstract domain R Clarisó, J Cortadella Static Analysis: 11th International Symposium, SAS 2004, Verona, Italy …, 2004 | 106 | 2004 |
| Coping with the variability of combinational logic delays J Cortadella, A Kondratyev, L Lavagno, C Sotiriou IEEE International Conference on Computer Design: VLSI in Computers and …, 2004 | 100 | 2004 |
| Scheduling and resource binding for low power E Musoll, J Cortadella Proceedings of the 8th international symposium on System synthesis, 104-109, 1995 | 100 | 1995 |
| Symbolic analysis of bounded Petri nets E Pastor, J Cortadella, O Roig IEEE Transactions on Computers 50 (5), 432-448, 2001 | 94 | 2001 |
| Timing-driven logic bi-decomposition J Cortadella IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2003 | 91 | 2003 |
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