A highly digital VCO-based ADC architecture for current sensing applications P Prabha, SJ Kim, K Reddy, S Rao, N Griesert, A Rao, G Winter, ... IEEE Journal of Solid-State Circuits 50 (8), 1785-1795, 2015 | 77 | 2015 |
8.7 A 112Gb/s ADC-DSP-based PAM-4 transceiver for long-reach applications with> 40dB channel loss in 7nm FinFET P Mishra, A Tan, B Helal, CR Ho, C Loi, J Riani, J Sun, K Mistry, ... 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 138-140, 2021 | 64 | 2021 |
A 54mw 1.2 gs/s 71.5 db sndr 50mhz bw vco-based ct δσ adc using dual phase/frequency feedback in 65nm cmos K Reddy, S Dey, S Rao, B Young, P Prabha, PK Hanumolu 2015 Symposium on VLSI Circuits (VLSI Circuits), C256-C257, 2015 | 53 | 2015 |
A Highly Reconfigurable 40-97GS/s DAC and ADC with 40GHz AFE Bandwidth and Sub-35fJ/conv-step for 400Gb/s Coherent Optical Applications in 7nm FinFET RL Nguyen, AM Castrillon, A Fan, A Mellati, BT Reyes, C Abidin, E Olsen, ... IEEE Int. Solid-State Circuits Conf.(ISSCC) Dig. Tech. Papers 64, 136-138, 2021 | 33 | 2021 |
A 400Gb/s transceiver for PAM-4 optical direct-detect application in 16nm FinFET C Loi, A Mellati, A Tan, A Farhoodfar, A Tiruvur, B Helal, B Killips, F Rad, ... 2019 IEEE International Solid-State Circuits Conference-(ISSCC), 120-122, 2019 | 33 | 2019 |
8.6 A Highly Reconfigurable 40-97GS/s DAC and ADC with 40GHz AFE Bandwidth and Sub-35fJ/conv-step for 400Gb/s Coherent Optical Applications in 7nm FinFET RL Nguyen, AM Castrillon, A Fan, A Mellati, BT Reyes, C Abidin, E Olsen, ... 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 136-138, 2021 | 19 | 2021 |
An 8 Gb/s–64 Mb/s, 2.3–4.2 mW/Gb/s burst-mode transmitter in 90 nm CMOS M Talegaonkar, A Elshazly, K Reddy, P Prabha, T Anand, PK Hanumolu IEEE Journal of Solid-State Circuits 49 (10), 2228-2242, 2014 | 13 | 2014 |
A VCO-based current-to-digital converter for sensor applications P Prabha, SJ Kim, K Reddy, S Rao, N Griesert, A Rao, G Winter, ... Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 1-4, 2014 | 8 | 2014 |
18.4 A 200GS/s 8b 20fJ/cs Receiver with> 60GHz AFE Bandwidth for 800Gb/s Optical Coherent Communications in 5nm FinFET RL Nguyen, A Mellati, A Fernandez, A Iyer, A Fan, B Reyes, C Abidin, ... 2024 IEEE International Solid-State Circuits Conference (ISSCC) 67, 344-346, 2024 | 1 | 2024 |
Systems and methods for linear variable gain amplifier P Prabha, K Raviprakash, L Wang, S Dallaire US Patent 11,463,059, 2022 | 1 | 2022 |
Clock and data recovery devices with fractional-N PLL M Talegaonkar, J Pernillo, J Sun, P Prabha, CF Loi, Y Liao, J Riani, ... US Patent 11,218,156, 2022 | 1 | 2022 |
18.3 An 8b 160GS/s 57GHz Bandwidth Time-Interleaved DAC and Driver-Based Transmitter with Adaptive Calibration for 800Gb/s Coherent Optical Applications in 5nm F Ahmad, A Mellati, A Fernandez, A Iyer, A Fan, B Reyes, C Abidin, ... 2024 IEEE International Solid-State Circuits Conference (ISSCC) 67, 342-344, 2024 | | 2024 |
Hybrid analog/digital equalizer architecture for high-speed receiver L Wang, B Smith, B Alnabulsi, S Dallaire, S Forey, K Raviprakash, ... US Patent 11,876,649, 2024 | | 2024 |
Variable gain amplifier including impedance ladder circuit with exponentially dependent degeneration resistance P Prabha, K Raviprakash, L Wang, S Dallaire US Patent 11,855,598, 2023 | | 2023 |
Clock and data recovery devices with fractional-N PLL M Talegaonkar, J Pernillo, J Sun, P Prabha, CF Loi, Y Liao, J Riani, ... US Patent 11,728,817, 2023 | | 2023 |
Design techniques for VCO based digital sensor readout circuits P Prabha | | 2014 |