| Three-dimensional NAND flash for vector–matrix multiplication P Wang, F Xu, B Wang, B Gao, H Wu, H Qian, S Yu IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (4), 988-991, 2018 | 109 | 2018 |
| Exploiting hybrid precision for training and inference: A 2T-1FeFET based analog synaptic weight cell X Sun, P Wang, K Ni, S Datta, S Yu 2018 IEEE international electron devices meeting (IEDM), 3.1. 1-3.1. 4, 2018 | 104 | 2018 |
| Direct comparison of ferroelectric properties in Hf0. 5Zr0. 5O2 between thermal and plasma-enhanced atomic layer deposition J Hur, N Tasneem, G Choe, P Wang, Z Wang, AI Khan, S Yu Nanotechnology 31 (50), 505707, 2020 | 56 | 2020 |
| Drain–erase scheme in ferroelectric field-effect transistor—Part I: Device characterization P Wang, Z Wang, W Shim, J Hur, S Datta, AI Khan, S Yu IEEE Transactions on Electron Devices 67 (3), 955-961, 2020 | 40 | 2020 |
| Drain-erase scheme in ferroelectric field effect transistor—Part II: 3-D-NAND architecture for in-memory computing P Wang, W Shim, Z Wang, J Hur, S Datta, AI Khan, S Yu IEEE Transactions on Electron Devices 67 (3), 962-967, 2020 | 37 | 2020 |
| Ferroelectric devices and circuits for neuro-inspired computing P Wang, S Yu MRS Communications 10 (4), 538-548, 2020 | 33 | 2020 |
| Ferroelectric HfO2-based synaptic devices: recent trends and prospects S Yu, J Hur, YC Luo, W Shim, G Choe, P Wang Semiconductor Science and Technology 36 (10), 104001, 2021 | 28 | 2021 |
| Integrated crossbar array with resistive synapses and oscillation neurons J Woo, P Wang, S Yu IEEE Electron Device Letters 40 (8), 1313-1316, 2019 | 28 | 2019 |
| Cryogenic behavior of NbO2 based threshold switching devices as oscillation neurons P Wang, AI Khan, S Yu Applied Physics Letters 116 (16), 2020 | 27 | 2020 |
| Investigating ferroelectric minor loop dynamics and history effect—Part I: Device characterization P Wang, Z Wang, X Sun, J Hur, S Datta, AI Khan, S Yu IEEE Transactions on Electron Devices 67 (9), 3592-3597, 2020 | 26 | 2020 |
| The impact of ferroelectric FETs on digital and analog circuits and architectures X Chen, X Sun, P Wang, S Datta, XS Hu, X Yin, M Jerry, S Yu, AF Laguna, ... IEEE Design & Test 37 (1), 79-99, 2019 | 23 | 2019 |
| Benchmark of ferroelectric transistor-based hybrid precision synapse for neural network accelerator Y Luo, P Wang, X Peng, X Sun, S Yu IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 5 …, 2019 | 22 | 2019 |
| Non-volatile, small-signal capacitance in ferroelectric capacitors YC Luo, J Hur, P Wang, AI Khan, S Yu Applied Physics Letters 117 (7), 2020 | 20 | 2020 |
| Investigating Ferroelectric Minor Loop Dynamics and History Effect--Part II: Physical Modeling and Impact on Neural Network Training P Wang, Z Wang, X Sun, J Hur, S Datta, AI Khan, S Yu IEEE Transactions on Electron Devices, 2020 | 20 | 2020 |
| Impact of random phase distribution in ferroelectric transistors-based 3-D NAND architecture on in-memory computing G Choe, W Shim, P Wang, J Hur, AI Khan, S Yu IEEE Transactions on Electron Devices 68 (5), 2543-2548, 2021 | 18 | 2021 |
| Depolarization Field Induced Instability of Polarization States in HfO2 Based Ferroelectric FET Z Wang, MM Islam, P Wang, S Deng, S Yu, AI Khan, K Ni 2020 IEEE International Electron Devices Meeting (IEDM), 4.5. 1-4.5. 4, 2020 | 16 | 2020 |
| Interplay of switching characteristics, cycling endurance and multilevel retention of ferroelectric capacitor J Hur, P Wang, Z Wang, G Choe, N Tasneem, AI Khan, S Yu 2020 IEEE International Electron Devices Meeting (IEDM), 39.5. 1-39.5. 4, 2020 | 15 | 2020 |
| Cryogenic benchmarks of embedded memory technologies for recurrent neural network based quantum error correction P Wang, X Peng, W Chakraborty, AI Khan, S Datta, S Yu 2020 IEEE International Electron Devices Meeting (IEDM), 38.5. 1-38.5. 4, 2020 | 12 | 2020 |
| Cryogenic performance for compute-in-memory based deep neural network accelerator P Wang, X Peng, W Chakraborty, A Khan, S Datta, S Yu 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2021 | 9 | 2021 |
| Ferroelectric tunnel junction optimization by plasma-enhanced atomic layer deposition J Hur, YC Luo, P Wang, N Tasneem, AI Khan, S Yu 2020 IEEE Silicon Nanoelectronics Workshop (SNW), 11-12, 2020 | 9 | 2020 |
Shimeng YuGeorgia Institute of Technology, Professor of ECE在 ece.gatech.edu 的电子邮件经过验证
