受强制性开放获取政策约束的文章 - Rajendra Patrikar了解详情
无法在其他位置公开访问的文章：4 篇
Memory characteristics of a 65 nm FGMOS capacitor with Si quantum dots as floating gates
R Dhavse, F Muhammed, C Sinha, V Mishra, RM Patrikar
2013 Annual IEEE India Conference (INDICON), 1-3, 2013
强制性开放获取政策： Department of Science & Technology, India
Simulation of quantum dot flash gate stack with lower tunneling voltages
R Dhavse, F Muhammed, C Sinha, V Mishra, RM Patrikar
2014 International Conference on Devices, Circuits and Communications …, 2014
强制性开放获取政策： Department of Science & Technology, India
Performance Appraisal and Static Behaviour Modeling of a Nano-scale Flash Memory Cell by Using Quantum Dots' Floating Gate.
R Dhavse, V Mishra, R Patrikar
International Journal of Simulation--Systems, Science & Technology 15 (6), 2014
强制性开放获取政策： Department of Science & Technology, India
Memory behaviour and distributed capacitive coupling model for low frequency inversion capacitance of a quantum dot flash memory gate stack
R Dhavse, K Suresh, V Mishra, R Patrikar
2014 8th Asia Modelling Symposium, 241-246, 2014
强制性开放获取政策： Department of Science & Technology, India
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