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Riccardo Scarsi
Riccardo Scarsi
未知所在单位机构
在 acm.org 的电子邮件经过验证
标题
引用次数
引用次数
年份
A discrete-time battery model for high-level power estimation
L Benini, G Castelli, A Macii, E Macii, M Poncino, R Scarsi
Proceedings of the conference on Design, automation and test in Europe, 35-41, 2000
2232000
Discrete-time battery models for system-level low-power design
L Benini, G Castelli, A Macii, E Macii, M Poncino, R Scarsi
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 9 (5), 630-640, 2001
2062001
Architectures and synthesis algorithms for power-efficient bus interfaces
L Benini, A Macii, M Poncino, R Scarsi
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2000
1372000
Battery-driven dynamic power management
L Benini, G Castelli, A Macii, R Scarsi
IEEE Design & Test of Computers 18 (2), 53-60, 2001
1232001
Symbolic synthesis of clock-gating logic for power optimization of synchronous controllers
L Benini, G De Micheli, E Macii, M Poncino, R Scarsi
ACM Transactions on Design Automation of Electronic Systems (TODAES) 4 (4 …, 1999
1051999
Extending lifetime of portable systems by battery scheduling
L Benini, G Castelli, A Macii, E Macii, M Poncino, R Scarsi
Proceedings Design, Automation and Test in Europe. Conference and Exhibition …, 2001
982001
Glitch power minimization by selective gate freezing
L Benini, G De Micheli, A Macii, E Macii, M Poncino, R Scarsi
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 8 (3), 287-298, 2000
892000
Synthesis of low-overhead interfaces for power-efficient communication over wide buses
L Benini, A Macii, E Macii, M Poncino, R Scarsi
Proceedings of the 36th annual ACM/IEEE Design Automation Conference, 128-133, 1999
651999
Battery-driven dynamic power management of portable systems
L Benini, G Castelli, A Macii, B Macii, R Scarai
Proceedings 13th International Symposium on System Synthesis, 25-30, 2000
622000
Symbolic synthesis of clock-gating logic for power optimization of control-oriented synchronous networks
L Benini, G De Micheli, E Macii, M Poncino, R Scarsi
Proceedings European Design and Test Conference. ED & TC 97, 514-520, 1997
581997
Symbolic algorithms for layout-oriented synthesis of pass transistor logic circuits
F Ferrandi, A Macii, E Macii, M Poncino, R Scarsi, F Somenzi
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided …, 1998
401998
Scheduling battery usage in mobile systems
L Benini, A Macii, E Macii, M Poncino, R Scarsi
IEEE transactions on very large scale integration (VLSI) systems 11 (6 …, 2003
282003
Stream synthesis for efficient power simulation based on spectral transforms
A Macii, E Macii, M Poncino, R Scarsi
Proceedings of the 1998 international symposium on Low power electronics and …, 1998
241998
Fast power estimation for deterministic input streams
D Micheli
1997 Proceedings of IEEE International Conference on Computer Aided Design …, 1997
211997
A spatially-adaptive bus interface for low-switching communication
A Acquaviva, R Scarsi
Proceedings of the 2000 international symposium on Low power electronics and …, 2000
152000
Glitch power minimization by gate freezing
L Benini, G De Micheli, A Macii, E Macii, M Poncino, R Scarsi
Proceedings of the conference on Design, automation and test in Europe, 36-es, 1999
101999
Life-time analysis of batteries used in portable digital systems
L Beinini, G Castelli, A Macii, E Macii, M Poncino, R Scarsi
2000 10th Mediterranean Electrotechnical Conference. Information Technology …, 2000
62000
Regression-based macromodeling for delay estimation of behavioral components
A Macii, E Macii, G Odasso, M Poncino, R Scarsi
Proceedings Ninth Great Lakes Symposium on VLSI, 188-191, 1999
61999
F-gate: a device for glitch power minimization
L Benini, A Macii, E Macii, M Poncino, R Scarsi
Conference Record of Thirty-Second Asilomar Conference on Signals, Systems …, 1998
41998
Layout-oriented synthesis of PTL circuits based on BDDs
F Ferrandi, A Macii, E Macii, M Poncino, R Scarsi, F Somenzi
Titolo volume non avvalorato, 514-519, 1998
41998
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