| An Efficient Decision Tree Based Architecture for Random Impulse Noise Removal in images SP Philip, SP Prakash, S Valarmathy International Journal of Advanced Research in Electrical, Electronics and …, 2013 | 4 | 2013 |
| FPGA implementation of ECC enabled multi-factor authentication (E-MFA) protocol for IoT based applications SR Sekar, S Elango, SP Philip, AD Raj Microelectronic Devices, Circuits and Systems: Second International …, 2021 | 3 | 2021 |
| A computationally efficient 11 band non-uniform filter bank for hearing aids targeting moderately sloping sensorineural hearing loss SP Philip, S Palaniswami, H Sivakumar Informacije MIDEM 50 (3), 153-168, 2020 | 3 | 2020 |
| High-Performance Multi-RNS-Assisted Concurrent RSA Cryptosystem Architectures S Elango, P Sampath, S Raja Sekar, SP Philip, A Danielraj Journal of Circuits, Systems and Computers 32 (15), 2350255, 2023 | 1 | 2023 |
| Design of Reconfigurable Signed Dual Modulo Multiplier Function (DMMF) for RNS E Sekar, S Palaniswami, SP Philip, K Gavaskar, A Danielraj 2021 Smart Technologies, Communication and Robotics (STCR), 1-5, 2021 | 1 | 2021 |
| Modelling of Parallel Unsigned 2n-1 Modular Arithmetic Multiplier for RNS S Elango, P Sampath, SP Philip, SR Sekar IOP Conference Series: Materials Science and Engineering 1084 (1), 012060, 2021 | 1 | 2021 |
| High-Performance Residue Arithmetic Based Elliptic Curve Cryptosystem Over GF (p) for Hardware Security S Elango, P Sampath, SR Sekar, SP Philip Microelectronic Devices, Circuits and Systems: Second International …, 2021 | 1 | 2021 |
| Investigation and VLSI Implementation of Linear Convolution Architecture For FPGA Based Signal Processing Applications S Elango, P Sampath, KS Ali, SP Philip, AD Raj International Journal of Pure and Applied Mathematics 119 (162018), 4607-4624, 2018 | 1 | 2018 |
| Design of Efficient Complementary Pass Transistor based Modified Booth Encoder Array Multiplier SP Philip, SP Prakash, S Valarmathi International Journal of Computer Applications 64 (5), 2013 | 1 | 2013 |
| Delay Efficient Cosine Modulated Reconfigurable Filter Bank for Digital Hearing Aids targeting Noise Induced Hearing Loss SP Philip, S Palaniswami, E SAKER Informacije MIDEM 54 (1), 3-16, 2024 | | 2024 |
| Design of unsigned 2n+ 1 parallel residue arithmetic multiplier S Elango, P Sampath, SP Philip, AD Raj AIP Conference Proceedings 2725 (1), 2023 | | 2023 |
| Design and implementation of an Embedded Linux based application for realtime Digital Video Recording subsystem FM Jacob, SP Philip, T Dinesh International Journal of Advanced Research in Computer Engineering …, 2015 | | 2015 |
| Investigations on design of efficient filter bank architectures for digital hearing aids SP Philip Chennai, 0 | | |
ELANGO SBannari Amman Institute of Technology, Sathyamangalam在 bitsathy.ac.in 的电子邮件经过验证
