| Enhanced generic architecture for safety increase of true random number generators V Kotě, V Molata, J Jakovenko Západočeská univerzita v Plzni, Fakulta elektrotechnická, 2014 | 9 | 2014 |
| A True random number generator with time multiplexed sources of randomness V Kote, P Vacula, V Molata, O Vesely, O Tlaskal, D Barri, J Jakovenko, ... Radioengineering 27 (3), 797, 2018 | 7 | 2018 |
| Improved structure of true random number generator with direct amplification of analog noise V Kotě, V Molata, J Jakovenko Západočeská univerzita v Plzni, Fakulta elektrotechnická, 2012 | 7 | 2012 |
| Capacitor-less linear regulator with NMOS power transistor V Molata, V Kotě, J Jakovenko Západočeská univerzita v Plzni, Fakulta elektrotechnická, 2013 | 6 | 2013 |
| MOSFETs’ Electrical Performance in the 160-nm BCD Technology Process With the Diamond Layout Shape D Barri, P Vacula, T Gresl, P Švancara, V Kotě, J Jakovenko, J Voves IEEE Transactions on Electron Devices 67 (8), 3270-3277, 2020 | 5 | 2020 |
| Improvements in the electrical performance of IC MOSFET components using diamond layout style versus traditional rectangular layout style calculated by conformal mapping D Barri, P Vacula, V Kotě, J Jakovenko, J Voves IEEE Transactions on Electron Devices 66 (9), 3718-3725, 2019 | 5 | 2019 |
| Comparison of MOSFET Gate Waffle Patterns Based on Specific On-Resistance P Vacula, V Kotě, D Barri, M Vacula, M Husak, J Jakovenko Radioengineering 27 (3), 598-609, 2019 | 4 | 2019 |
| Automated pre-placement phase as a part of robust analog-mixed signal physical design flow V Kote, A Kubacak, P Vacula, J Jakovenko, M Husak Integration 63, 18-30, 2018 | 4 | 2018 |
| Incremental control techniques for layout modification P Vacula, V Kotě, A Kubačák, M Lžíčař, R Zelený, M Husák, J Jakovenko 2016 11th International Conference on Advanced Semiconductor Devices …, 2016 | 4 | 2016 |
| Incremental control techniques for layout modification of integrated circuits P Vacula, V Kotě, A Kubačák, M Lžíčař, M Husák, J Jakovenko Advances in Science, Technology and Engineering Systems Journal, ASTESJ 2, 2017 | 3 | 2017 |
| Transistors with dissimilar square waffle gate patterns P Vacula, M Vacula, V Kote, A Kubacak, M Lzicar US Patent 10,147,796, 2018 | 2 | 2018 |
| Behavioral Models of True Random Number Generators V Kotě, V Molata, P Vacula Proceedings of the 22th International Scientific Student Conferenece POSTER …, 2018 | 2 | 2018 |
| Design of True Random Number Generators Suitables for Integrated Circuits V Kotě PQDT-Global, 2018 | 1 | 2018 |
| Trench MOS Having Source with Waffle Patterns P VACULA, V Kote, D Barri Proceedings of the International Student Scientific Conference Poster–22/2018, 2018 | 1 | 2018 |
| Differential evolutionary optimization algorithm applied to ESD MOSFET model fitting problem T Napravnik, V Kote, V Molata, J Jakovenko 2012 IEEE 15th International Symposium on Design and Diagnostics of …, 2012 | 1 | 2012 |
| Precise Model of the Effective Threshold Voltage Changes in the DLS MOSFETs for Different Gate Angles Compared with Measured Data D Barri, P Vacula, V Kotě, M Vacula, J Jakovenko, J Voves 2022 International Conference on Applied Electronics (AE), 1-6, 2022 | | 2022 |
| Návrh generátorů pravých náhodných čísel vhodných pro integrované obvody V Kotě České vysoké učení technické v Praze. Vypočetní a informační centrum., 2018 | | 2018 |
| Generátor pravých náhodných čísel V Kotě České vysoké učení technické v Praze. Vypočetní a informační centrum., 2011 | | 2011 |
