A formal verification environment for railway signaling system design C Bernardeschi, A Fantechi, S Gnesi, S Larosa, G Mongardi, D Romano Formal methods in system design 12, 139-161, 1998 | 90 | 1998 |
Model checking fault tolerant systems C Bernardeschi, A Fantechi, S Gnesi Software testing, verification and reliability 12 (4), 251-275, 2002 | 65 | 2002 |
Design and safety verification of a distributed charge equalizer for modular li-ion batteries F Baronti, C Bernardeschi, L Cassano, A Domenici, R Roncella, R Saletti IEEE Transactions on Industrial Informatics 10 (2), 1003-1011, 2014 | 62 | 2014 |
A PVS-simulink integrated environment for model-based analysis of cyber-physical systems C Bernardeschi, A Domenici, P Masci IEEE Transactions on Software Engineering 44 (6), 512-533, 2017 | 51 | 2017 |
Java bytecode verification for secure information flow M Avvenuti, C Bernardeschi, N De Francesco ACM SIGPLAN Notices 38 (12), 20-27, 2003 | 51 | 2003 |
SRAM-based FPGA systems for safety-critical applications: A survey on design standards and proposed methodologies C Bernardeschi, L Cassano, A Domenici Journal of Computer Science and Technology 30, 373-390, 2015 | 47 | 2015 |
Accurate simulation of SEUs in the configuration memory of SRAM-based FPGAs C Bernardeschi, L Cassano, A Domenici, L Sterpone 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2012 | 39 | 2012 |
Checking security of java bytecode by abstract interpretation R Barbuti, C Bernardeschi, N De Francesco Proceedings of the 2002 ACM symposium on Applied computing, 229-236, 2002 | 39 | 2002 |
Formally verifying fault tolerant system designs C Bernardeschi, A Fantechi, L Simoncini The Computer Journal 43 (3), 191-205, 2000 | 38 | 2000 |
Combining abstract interpretation and model checking for analysing security properties of Java bytecode C Bernardeschi, N De Francesco International Workshop on Verification, Model Checking, and Abstract …, 2002 | 37 | 2002 |
PyXEL: an integrated environment for the analysis of fault effects in SRAM-based FPGA routing L Bozzoli, C De Sio, L Sterpone, C Bernardeschi 2018 International Symposium on Rapid System Prototyping (RSP), 70-75, 2018 | 30 | 2018 |
Formal verification and co-simulation in the design of a synchronous motor control algorithm C Bernardeschi, P Dini, A Domenici, M Palmieri, S Saponara Energies 13 (16), 4057, 2020 | 28 | 2020 |
Abstract interpretation of operational semantics for secure information flow R Barbuti, C Bernardeschi, N De Francesco Information Processing Letters 83 (2), 101-108, 2002 | 28 | 2002 |
ASSESS: A simulator of soft errors in the configuration memory of SRAM-based FPGAs C Bernardeschi, L Cassano, A Domenici, L Sterpone IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014 | 27 | 2014 |
Checking secure information flow in java bytecode by code transformation and standard bytecode verification C Bernardeschi, N De Francesco, G Lettieri, L Martini Software: Practice and Experience 34 (13), 1225-1255, 2004 | 27 | 2004 |
Transformations and consistent semantics for ODP viewpoints C Bernardeschi, J Dustzadeh, A Fantechi, E Najm, A Nimour, F Olsen Formal Methods for Open Object-based Distributed Systems: Volume 2, 371-386, 1997 | 26 | 1997 |
A framework for FMI-based co-simulation of human–machine interfaces M Palmieri, C Bernardeschi, P Masci Software and Systems Modeling 19 (3), 601-623, 2020 | 25 | 2020 |
Early prototyping of wireless sensor network algorithms in PVS C Bernardeschi, P Masci, H Pfeifer Computer Safety, Reliability, and Security: 27th International Conference …, 2008 | 24 | 2008 |
Ros/gazebo based simulation of co-operative uavs C Bernardeschi, A Fagiolini, M Palmieri, G Scrima, F Sofia Modelling and Simulation for Autonomous Systems: 5th International …, 2019 | 23 | 2019 |
Co-simulation of semi-autonomous systems: the Line Follower Robot case study M Palmieri, C Bernardeschi, P Masci Software Engineering and Formal Methods: SEFM 2017 Collocated Workshops …, 2018 | 23 | 2018 |