| A 12 bit 2.9 GS/s DAC With IM3 60 dBc Beyond 1 GHz in 65 nm CMOS CH Lin, FML Van Der Goes, JR Westra, J Mulder, Y Lin, E Arslan, ... IEEE Journal of Solid-State Circuits 44 (12), 3285-3293, 2009 | 323 | 2009 |
| Cascode amplifier bias circuits J Klaren, P Wagh, D Kovac, ES Shapiro, N Calanca, DW Nobbe, ... US Patent 10,250,199, 2019 | 55 | 2019 |
| An 800 MS/s dual-residue pipeline ADC in 40 nm CMOS D Vecchi, J Mulder, FML van der Goes, JR Westra, E Ayranci, CM Ward, ... IEEE journal of solid-state circuits 46 (12), 2834-2844, 2011 | 36 | 2011 |
| An 800MS/s dual-residue pipeline ADC in 40nm CMOS J Mulder, FML van der Goes, D Vecchi, JR Westra, E Ayranci, CM Ward, ... 2011 IEEE International Solid-State Circuits Conference, 184-186, 2011 | 28 | 2011 |
| Enhancement of VCO linearity and phase noise by implementing frequency locked loop E Ayranci, K Christensen, P Andreani EUROCON 2007-The International Conference on" Computer as a Tool", 2593-2599, 2007 | 26 | 2007 |
| Source switched split LNA E Ayranci, M Sanner US Patent 9,973,149, 2018 | 18 | 2018 |
| Programmable optimized band switching LNA for operation in multiple narrow-band frequency ranges E Ayranci, M Sanner US Patent 9,941,849, 2018 | 14 | 2018 |
| Adaptive tuning networks with direct mapped multiple channel filter tuning E Ayranci, M Sanner, K Li, JF McElwee, TT Ranta, K Roberts, CC Cheng US Patent 10,700,658, 2020 | 12 | 2020 |
| Optimized multi gain LNA enabling low current and high linearity including highly linear active bypass E Ayranci, M Sanner US Patent 10,038,418, 2018 | 12 | 2018 |
| Optimized multi gain LNA enabling low current and high linearity including highly linear active bypass E Ayranci, M Sanner US Patent 11,152,907, 2021 | 10 | 2021 |
| Drain sharing split LNA M Sanner, E Ayranci US Patent 10,381,991, 2019 | 10 | 2019 |
| Turn on time acceleration of a cascode amplifier E Ayranci, NS Paranjape US Patent 10,938,349, 2021 | 9 | 2021 |
| Drain switched split amplifier with capacitor switching for noise figure and isolation improvement in split mode K Pal, E Ayranci, M Sanner US Patent 10,686,409, 2020 | 9 | 2020 |
| Programmable optimized band switching LNA for operation in multiple narrow-band frequency ranges E Ayranci, M Sanner US Patent 10,476,453, 2019 | 8 | 2019 |
| Stacked multi-stage programmable LNA architecture E Ayranci, M Sanner, M Rui, J Qayyum US Patent 12,113,485, 2024 | 7 | 2024 |
| Optimized multi gain LNA enabling low current and high linearity including highly linear active bypass E Ayranci, M Sanner US Patent 10,673,401, 2020 | 7 | 2020 |
| RFFE LNA topology supporting both noncontiguous intraband carrier aggregation and interband carrier aggregation E Ayranci, M Sanner, P Yerramilli US Patent 10,771,025, 2020 | 5 | 2020 |
| Configurable wideband split LNA E Ayranci, M Sanner, P Yerramilli US Patent 10,700,650, 2020 | 5 | 2020 |
| Low Noise Amplifier with Tunable Bypass Match J Golat, D Kovac, E Ayranci, M Sanner US Patent App. 16/201,777, 2019 | 5 | 2019 |
| Reconfigurable carrier aggregation FECC with switched filters and programmable band switching LNA E Ayranci, M Sanner, P Yerramilli, K Pal US Patent 10,326,484, 2019 | 4 | 2019 |
