Secure Function Evaluation Using an FPGA Overlay Architecture X Fang, S Ioannidis, M Leeser | 27 | 2017 |
Open-source variable-precision floating-point library for major commercial fpgas X Fang, M Leeser ACM Transactions on Reconfigurable Technology and Systems (TRETS) 9 (3), 1-17, 2016 | 27 | 2016 |
Power analysis attack on hardware implementation of MAC-Keccak on FPGAs P Luo, Y Fei, X Fang, AA Ding, M Leeser, DR Kaeli 2014 International Conference on ReConFigurable Computing and FPGAs …, 2014 | 23 | 2014 |
Garbled Circuits in the Cloud using FPGA Enabled Nodes K Huang, G Mehmet, X Fang, I Stratis, M Leeser 2019 IEEE High Performance Extreme Computing Conference(HPEC ‘19), 1, 2019 | 22 | 2019 |
Side-channel analysis of MAC-Keccak hardware implementations P Luo, Y Fei, X Fang, AA Ding, DR Kaeli, M Leeser Cryptology ePrint Archive, 2015 | 22 | 2015 |
Vendor agnostic, high performance, double precision Floating Point division for FPGAs X Fang, M Leeser 2013 IEEE High Performance Extreme Computing Conference (HPEC), 1-5, 2013 | 21 | 2013 |
SIFO: secure computational infrastructure using FPGA overlays X Fang, S Ioannidis, M Leeser International Journal of Reconfigurable Computing 2019 (1), 1439763, 2019 | 13 | 2019 |
Balance Power Leakage to Fight Against Side-Channel Analysis at Gate Level in FPGAs X Fang, P Luo, Y Fei, M Leeser IEEE ASAP 2015 Conference, 2015 | 10 | 2015 |
Leakage evaluation on power balance countermeasure against side-channel attack on FPGAs X Fang, P Luo, Y Fei, M Leeser 2015 IEEE High Performance Extreme Computing Conference (HPEC), 1-6, 2015 | 4 | 2015 |
Privacy preserving computations accelerated using FPGA overlays X Fang Northeastern University, 2017 | 3 | 2017 |
Garbled Circuits for Preserving Privacy in the Datacenter X Fang, S Ioannidis, M Leeser International Workshop on Heterogeneous High-performance Reconfigurable …, 2016 | 3 | 2016 |
Variable precision floating point reciprocal, division and square root for major FPGA vendors X Fang | 3 | 2013 |