Detail-Preserving Pooling in Deep Networks F Saeedan, N Weber, M Goesele, S Roth Proceedings of the IEEE Conference on Computer Vision and Pattern …, 2018 | 145 | 2018 |
Rapid, Detail-Preserving Image Downscaling N Weber, M Waechter, SC Amend, S Guthe, M Goesele ACM Transactions on Graphics (TOG) 35 (6), 205, 2016 | 74 | 2016 |
Fast dynamic memory allocator for massively parallel architectures S Widmer, D Wodniok, N Weber, M Goesele Proceedings of the 6th Workshop on General Purpose Processor Using Graphics …, 2013 | 34 | 2013 |
MATOG: Array Layout Auto-Tuning for CUDA N Weber, M Goesele ACM Transactions on Architecture and Code Optimization (TACO) 14 (3), 28, 2017 | 21 | 2017 |
Auto-Tuning Complex Array Layouts for GPUs N Weber, M Goesele Proceedings of the 14th Eurographics Symposium on Parallel Graphics and …, 2014 | 19 | 2014 |
BrainSlug: Transparent Acceleration of Deep Learning Through Depth-First Parallelism N Weber, F Schmidt, M Niepert, F Huici arXiv preprint arXiv:1804.08378, 2018 | 9 | 2018 |
Systems and methods for data compression in neural networks N Weber, F Huici, M Niepert US Patent App. 16/012,832, 2019 | 8 | 2019 |
Adaptive GPU Array Layout Auto-Tuning N Weber, M Goesele Proceedings of the ACM Workshop on Software Engineering Methods for Parallel …, 2016 | 8 | 2016 |
Prospect for Knowledge in Survey Data: An Artificial Neural Network Sensitivity Analysis P Weber, N Weber, M Goesele, R Kabst Social Science Computer Review 36 (5), 575-590, 2018 | 7 | 2018 |
Guided profiling for auto-tuning array layouts on GPUs N Weber, SC Amend, M Goesele Proceedings of the 6th International Workshop on Performance Modeling …, 2015 | 7 | 2015 |
ZERO-COPY SPARSE MATRIX FACTORIZATION SYNTHESIS FOR HETEROGENEOUS COMPUTE SYSTEMS D Thuerck, N Weber US Patent App. 17/519,630, 2023 | 6 | 2023 |
SOL: Effortless Device Support for AI Frameworks without Source Code Changes N Weber, F Huici 2020 20th IEEE/ACM International Symposium on Cluster, Cloud and Internet …, 2020 | 4 | 2020 |
Sol: Transparent neural network acceleration platform N Weber Proceedings of Supercomputing, 2018 | 4 | 2018 |
Computation graph optimization by partial evaluations N Weber, D Thuerck US Patent App. 17/572,740, 2023 | 1 | 2023 |
Full asynchronous execution queue for accelerator hardware N Weber US Patent 11,593,157, 2023 | 1 | 2023 |
SOL: Reducing the Maintenance Overhead for Integrating Hardware Support into AI Frameworks N Weber arXiv preprint arXiv:2205.10357, 2022 | 1 | 2022 |
Flynn’s Reconciliation: Automating the Register Cache Idiom for Cross-accelerator Programming D Thuerck, N Weber, R Bifulco ACM Transactions on Architecture and Code Optimization (TACO) 18 (3), 1-26, 2021 | 1 | 2021 |
Towards Transparent Neural Network Acceleration N Weber, M Niepert, F Huici | 1 | 2018 |
GPU Array Access Auto-Tuning N Weber Technische Universität Darmstadt, 2017 | 1 | 2017 |
Higher-Rank Irreducible Cartesian Tensors for Equivariant Message Passing V Zaverkin, F Alesiani, T Maruyama, F Errica, H Christiansen, M Takamoto, ... arXiv preprint arXiv:2405.14253, 2024 | | 2024 |