| Optimal selection of components value for analog active filter design using simplex particle swarm optimization BP De, R Kar, D Mandal, SP Ghoshal International Journal of Machine Learning and Cybernetics 6, 621-636, 2015 | 51 | 2015 |
| Optimal analog active filter design using craziness‐based particle swarm optimization algorithm BP De, R Kar, D Mandal, SP Ghoshal International Journal of Numerical Modelling: Electronic Networks, Devices …, 2015 | 31 | 2015 |
| Particle swarm optimization with aging leader and challengers for optimal design of analog active filters BP De, R Kar, D Mandal, SP Ghoshal Circuits, Systems, and Signal Processing 34, 707-737, 2015 | 30 | 2015 |
| An efficient design of CMOS comparator and folded cascode op-amp circuits using particle swarm optimization with an aging leader and challengers algorithm BP De, R Kar, D Mandal, SP Ghoshal International Journal of Machine Learning and Cybernetics, 1-20, 2015 | 30 | 2015 |
| CMOS Analog Amplifier Circuits Design Using Seeker Optimization Algorithm KB Maji, BP De, R Kar, D Mandal, SP Ghoshal IETE Journal of Research 68 (2), 1-10, 2022 | 20 | 2022 |
| PSO with aging leader and challengers for optimal design of high speed symmetric switching CMOS inverter BP De, R Kar, D Mandal, SP Ghoshal International Journal of Machine Learning and Cybernetics, 1-20, 2016 | 17 | 2016 |
| Soft computing-based approach for optimal design of on-chip comparator and folded-cascode op-amp using colliding bodies optimization BP De, R Kar, D Mandal, SP Ghoshal International Journal of Numerical Modelling: Electronic Networks, Devices …, 2016 | 16 | 2016 |
| Design of Optimal CMOS Analog Amplifier Circuits Using a Hybrid Evolutionary Optimization Technique BP De, KB Maji, R Kar, D Mandal, SP Ghoshal Journal of Circuits, Systems, and Computers, 1850029, 2017 | 15 | 2017 |
| Design of symmetric switching CMOS inverter using PSOCFIWA B P De, R Kar, D Mandal, SP Ghoshal Communications and Signal Processing (ICCSP), 2014 International Conference …, 2014 | 14 | 2014 |
| Symbiotic Organisms Search Algorithm for Optimal Design of CMOS Two-stage Op-amp with Nulling Resistor and Robust Bias Circuit S Ghosh, BP De, R Kar, AK Mal IET Circuits, Devices & Systems, 1-10, 2019 | 13 | 2019 |
| Optimal design of complementary metal-oxide-semiconductor analogue circuits: An evolutionary approach S Ghosh, BP De, R Kar, D Mandal, AK Mal Computers & Electrical Engineering 80 (2019), 1-19, 2019 | 12 | 2019 |
| Optimal design of high speed symmetric switching CMOS inverter using hybrid harmony search with differential evolution BP De, R Kar, D Mandal, SP Ghoshal Soft Computing 20, 3699-3717, 2016 | 11 | 2016 |
| Optimal design of a 5.5-GHz low-power high-gain CMOS LNA using the flower pollination algorithm S Ghosh, BP De, R Kar, D Mandal, AK Mal Journal of Computational Electronics 18 (2), 737-747, 2019 | 10 | 2019 |
| Application of Improved PSO for Optimal Design of CMOS Two-stage Op-amp using Nulling Resistor Compensation Circuit BP De, KB Maji, R Kar, D Mandal, SP Ghoshal 2017 Devices for Integrated Circuit (DevIC), 23-24 March, 2017, Kalyani …, 2017 | 10 | 2017 |
| Optimal CMOS inverter design using differential evolution algorithm BP De, R Kar, D Mandal, SP Ghoshal Journal of Electrical Systems and Information Technology 2 (2), 219-241, 2015 | 9 | 2015 |
| Optimal high speed CMOS inverter design using craziness based Particle Swarm Optimization Algorithm BP De, R Kar, D Mandal, SP Ghoshal Open Engineering 5 (1), 2015 | 9 | 2015 |
| Comprehensive analysis of delay in UDSM CMOS circuits J Samanta, BP De 2011 International Conference on Electronics, Communication and Computing …, 2011 | 7 | 2011 |
| Optimal Design Of Ultra-Low-Power 2.4 GHz LNA For IEEE 802.15.4/Bluetooth Applications S Ghosh, BP De, KB Maji, R Kar, D Mandal, AK Mal Journal of Circuits, Systems, and Computers, 2020 | 6 | 2020 |
| Graphene-based electrodes for ECG signal monitoring: Fabrication methodologies, challenges and future directions R Dey, PK Samanta, RP Chokda, BP De, B Appasani, A Srinivasulu, ... Cogent Engineering 10 (1), 2246750, 2023 | 5 | 2023 |
| Performance Assessment of Graded Channel Gate-Stack based Double Gate MOSFET for Bio-sensing Applications D Chowdhury, BP De, SK Maity, NK Singh, R Kar, D Mandal Silicon, 2022 | 5 | 2022 |
Rajib KarAssociate Professor, Department of ECE, NIT Durgapur, India在 nitdgp.ac.in 的电子邮件经过验证
