Nonvolatile memory device, operating method thereof and memory system including the same CW Yoon, D Chae, JW Park, SW Nam US Patent 8,559,235, 2013 | 610 | 2013 |
Nonvolatile memory devices, channel boosting methods thereof, programming methods thereof, and memory systems including the same CW Yoon, D Chae, SW Nam, SW Yun US Patent 8,654,587, 2014 | 540 | 2014 |
Three-dimensional 128 Gb MLC vertical NAND flash memory with 24-WL stacked layers and 50 MB/s high-speed programming KT Park, S Nam, D Kim, P Kwak, D Lee, YH Choi, MH Choi, DH Kwak, ... IEEE Journal of Solid-State Circuits 50 (1), 204-213, 2014 | 336 | 2014 |
Nonvolatile memory devices and driving methods thereof KH Kang, SW Nam, D Chae, CW Yoon US Patent 8,971,114, 2015 | 186 | 2015 |
7.2 A 128Gb 3b/cell V-NAND flash memory with 1Gb/s I/O rate JW Im, WP Jeong, DH Kim, SW Nam, DK Shim, MH Choi, HJ Yoon, ... 2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015 | 125 | 2015 |
Nonvolatile memory devices, channel boosting methods thereof, programming methods thereof, and memory systems including the same CW Yoon, D Chae, SW Nam, SW Yun US Patent 8,493,789, 2013 | 86 | 2013 |
A 128 Gb 3b/cell V-NAND flash memory with 1 Gb/s I/O rate W Jeong, J Im, DH Kim, SW Nam, DK Shim, MH Choi, HJ Yoon, DH Kim, ... IEEE Journal of Solid-State Circuits 51 (1), 204-212, 2015 | 79 | 2015 |
Control method of nonvolatile memory device S Shim, J Han, SW Nam, J Won-Taeck US Patent 8,908,431, 2014 | 59 | 2014 |
Nonvolatile memory device and memory system including the same SW Nam, KH Kang, J Park US Patent 8,976,591, 2015 | 46 | 2015 |
Nonvolatile memory and erasing method thereof SW Nam, WT Jung, J Park US Patent 8,837,228, 2014 | 43 | 2014 |
Nonvolatile memory device and read method thereof SW Nam, CW Yoon, JS Kim US Patent 8,953,376, 2015 | 40 | 2015 |
Nonvolatile memory device with 3D memory cell array JH Park, KH Kang, CW Yoon, SW Nam, SW Yun US Patent 8,570,808, 2013 | 40 | 2013 |
Nonvolatile memory device, a memory system having the same, and a read method thereof, the read method applying a read pass voltage to a selected wordline after a sensing SW Nam, P Kitae, HW Park, JK Rhee US Patent 9,183,939, 2015 | 37 | 2015 |
Memory device, memory system and method of operating memory device SW Nam, D Kim, DS Byeon, CW Yoon US Patent 9,514,827, 2016 | 35 | 2016 |
Memory system including nonvolatile memory device and erase method thereof SW Nam US Patent 9,293,206, 2016 | 33 | 2016 |
3D flash memory device having different dummy word lines and data storage devices including same SW Nam, P Kitae US Patent 9,812,206, 2017 | 32 | 2017 |
30.3 A 512Gb 3b/Cell 7th -Generation 3D-NAND Flash Memory with 184MB/s Write Throughput and 2.0Gb/s Interface J Cho, DC Kang, J Park, SW Nam, JH Song, BK Jung, J Lyu, H Lee, ... 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 426-428, 2021 | 31 | 2021 |
Erase system and method of nonvolatile memory device SW Nam US Patent 9,053,978, 2015 | 30 | 2015 |
Non-volatile memory device for detecting progressive error, memory system, and method of operating the non-volatile memory device SW Nam, BG Jeon, DS Byeon US Patent 9,842,659, 2017 | 29 | 2017 |
Nonvolatile memory device and method of programming the same SW Nam, J Park US Patent 9,025,383, 2015 | 27 | 2015 |