| Exploring logic optimizations with reinforcement learning and graph convolutional network K Zhu, M Liu, H Chen, Z Zhao, DZ Pan Proceedings of the 2020 ACM/IEEE Workshop on Machine Learning for CAD, 145-150, 2020 | 68 | 2020 |
| MAGICAL: An open-source fully automated analog IC layout system from netlist to GDSII H Chen, M Liu, B Xu, K Zhu, X Tang, S Li, Y Lin, N Sun, DZ Pan IEEE Design & Test 38 (2), 19-26, 2020 | 49 | 2020 |
| A multithreaded initial detailed routing algorithm considering global routing guides FK Sun, H Chen, CY Chen, CH Hsu, YW Chang 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-7, 2018 | 40 | 2018 |
| Toward silicon-proven detailed routing for analog and mixed-signal circuits H Chen, K Zhu, M Liu, X Tang, N Sun, DZ Pan Proceedings of the 39th International Conference on Computer-Aided Design, 1-8, 2020 | 32 | 2020 |
| Universal symmetry constraint extraction for analog and mixed-signal circuits with graph neural networks H Chen, K Zhu, M Liu, X Tang, N Sun, DZ Pan 2021 58th ACM/IEEE Design Automation Conference (DAC), 1243-1248, 2021 | 31 | 2021 |
| Effective analog/mixed-signal circuit placement considering system signal flow K Zhu, H Chen, M Liu, X Tang, N Sun, DZ Pan Proc ICCAD, 2020 | 28 | 2020 |
| MAGICAL 1.0: An Open-Source Fully-Automated AMS Layout Synthesis Framework Verified With a 40-nm 1GS/s Δ∑ ADC H Chen, M Liu, X Tang, K Zhu, A Mukherjee, N Sun, DZ Pan 2021 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2021 | 26 | 2021 |
| Challenges and opportunities toward fully automated analog layout design H Chen, M Liu, X Tang, K Zhu, N Sun, DZ Pan Journal of Semiconductors 41 (11), 111407, 2020 | 25 | 2020 |
| A DAG-based algorithm for obstacle-aware topology-matching on-track bus routing CH Hsu, SC Hung, H Chen, FK Sun, YW Chang IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2020 | 19 | 2020 |
| Automating analog constraint extraction: From heuristics to learning K Zhu, H Chen, M Liu, DZ Pan 2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC), 108-113, 2022 | 15 | 2022 |
| OpenSAR: An open source automated end-to-end SAR ADC compiler M Liu, X Tang, K Zhu, H Chen, N Sun, DZ Pan 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-9, 2021 | 14 | 2021 |
| Why are graph neural networks effective for eda problems? H Ren, S Nath, Y Zhang, H Chen, M Liu Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided …, 2022 | 12 | 2022 |
| Tag: Learning circuit spatial embedding from layouts K Zhu, H Chen, WJ Turner, GF Kokai, PH Wei, DZ Pan, H Ren Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided …, 2022 | 9 | 2022 |
| Tutorial and perspectives on MAGICAL: A silicon-proven open-source analog IC layout system K Zhu, H Chen, M Liu, DZ Pan IEEE Transactions on Circuits and Systems II: Express Briefs 70 (2), 715-720, 2022 | 9 | 2022 |
| Generative-adversarial-network-guided well-aware placement for analog circuits K Zhu, H Chen, M Liu, X Tang, W Shi, N Sun, DZ Pan 2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC), 519-525, 2022 | 9 | 2022 |
| Autocraft: Layout automation for custom circuits in advanced finfet technologies H Chen, WJ Turner, S Song, K Zhu, GF Kokai, B Zimmer, CT Gray, ... Proceedings of the 2022 International Symposium on Physical Design, 175-183, 2022 | 7 | 2022 |
| CAD for Analog/Mixed‐Signal Integrated Circuits AF Budak, DZ Pan, H Chen, K Zhu, M Liu, MB Alawieh, S Zhang, W Shi, ... Advances in Semiconductor Technologies: Selected Topics Beyond Conventional …, 2022 | 6 | 2022 |
| Reinforcement learning guided detailed routing for custom circuits H Chen, KC Hsu, WJ Turner, PH Wei, K Zhu, DZ Pan, H Ren Proceedings of the 2023 International Symposium on Physical Design, 26-34, 2023 | 5 | 2023 |
| 1-and 80-MS/s SAR ADCs in 40-nm CMOS With End-to-End Compilation M Liu, X Tang, K Zhu, H Chen, N Sun, DZ Pan IEEE Solid-State Circuits Letters 5, 292-295, 2022 | 5 | 2022 |
| Routability-aware placement for advanced FinFET mixed-signal circuits using satisfiability modulo theories H Chen, WJ Turner, DZ Pan, H Ren 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 160-165, 2022 | 5 | 2022 |
David Z. PanProfessor, Silicon Labs Endowed Chair, ECE Dept., University of Texas at Austin在 ece.utexas.edu 的电子邮件经过验证
