A 1.9-GHz wide-band IF double conversion CMOS receiver for cordless telephone applications JC Rudell, JJ Ou, TB Cho, G Chien, F Brianti, JA Weldon, PR Gray IEEE Journal of Solid-State Circuits 32 (12), 2071-2088, 1997 | 728 | 1997 |
A 1.75 GHz highly-integrated narrow-band CMOS transmitter with harmonic-rejection mixers JA Weldon, JC Rudell, RSN Li Lin, M Otsuka, S Dedieu, L Tee, KC Tsai, ... 2001 IEEE International Solid-State Circuits Conference (ISSCC), 160-161, 2001 | 502 | 2001 |
A single-chip digitally calibrated 5.15-5.825-GHz 0.18-μm CMOS transceiver for 802.11 a wireless LAN I Vassiliou, K Vavelidis, T Georgantas, S Plevridis, N Haralabidis, ... IEEE Journal of Solid-State Circuits 38 (12), 2221-2231, 2003 | 166 | 2003 |
A 1.9 GHz wide-band IF double conversion CMOS integrated receiver for cordless telephone applications JC Rudell, JJ Ou, TB Cho, G Chien, F Brianti, JA Weldon, PR Gray 1997 IEEE International Solids-State Circuits Conference. Digest of …, 1997 | 157 | 1997 |
A class-G switched-capacitor RF power amplifier SM Yoo, JS Walling, O Degani, B Jann, R Sadhwani, JC Rudell, DJ Allstot IEEE Journal of Solid-State Circuits 48 (5), 1212-1224, 2013 | 132 | 2013 |
Recent developments in high integration multi-standard CMOS transceivers for personal communication systems JC Rudell, JJ Ou, RS Narayanaswami, G Chien, JA Weldon, L Lin, ... Proceedings. 1998 International Symposium on Low Power Electronics and …, 1998 | 124 | 1998 |
A digitally calibrated 5.15-5.825 GHz transceiver for 802.11 a wireless LANs in 0.18/spl mu/m CMOS J Bouras, S Bouras, T Georgantas, N Haralabidis, G Kamoulakos, ... 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of …, 2003 | 90 | 2003 |
An integrated GSM/DECT receiver: Design specifications JC Rudell, JA Weldon, JJ Ou, L Lin, P Gray UCB Electronics Research Laboratory Memorandum, 1998 | 83 | 1998 |
Wideband dual-injection path self-interference cancellation architecture for full-duplex transceivers T Zhang, C Su, A Najafi, JC Rudell IEEE Journal of Solid-State Circuits 53 (6), 1563-1576, 2018 | 80 | 2018 |
An ultra-wideband IF millimeter-wave receiver with a 20 GHz channel bandwidth using gain-equalized transformers V Bhagavatula, T Zhang, AR Suvarna, JC Rudell IEEE Journal of Solid-State Circuits 51 (2), 323-331, 2016 | 71 | 2016 |
A broadband and deep-TX self-interference cancellation technique for full-duplex and frequency-domain-duplex transceiver applications KD Chu, M Katanbaf, T Zhang, C Su, JC Rudell 2018 IEEE International Solid-State Circuits Conference-(ISSCC), 170-172, 2018 | 66 | 2018 |
A single-chip quad-band GSM/GPRS transceiver in 0.18/spl mu/m standard CMOS OE Erdogan, R Gupta, DG Yee, JC Rudell, JS Ko, R Brockenbrough, ... ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State …, 2005 | 60 | 2005 |
A 1.7-to-2.2 GHz full-duplex transceiver system with> 50dB self-interference cancellation over 42MHz bandwidth T Zhang, A Najafi, C Su, JC Rudell 2017 IEEE International Solid-State Circuits Conference (ISSCC), 314-315, 2017 | 56 | 2017 |
A 50 MHz eight-tap adaptive equalizer for partial-response channels CSH Wong, JC Rudell, GT Uehara, PR Gray IEEE Journal of Solid-State Circuits 30 (3), 228-234, 1995 | 55 | 1995 |
A single-chip bidirectional neural interface with high-voltage stimulation and adaptive artifact cancellation in standard CMOS JP Uehlin, WA Smith, VR Pamula, EP Pepin, S Perlmutter, V Sathe, ... IEEE Journal of Solid-State Circuits 55 (7), 1749-1761, 2020 | 54 | 2020 |
A 12 bit 200 MS/s zero-crossing-based pipelined ADC with early sub-ADC decision and output residue background calibration SK Shin, JC Rudell, DC Daly, CE Muñoz, DY Chang, K Gulati, HS Lee, ... IEEE Journal of Solid-State Circuits 49 (6), 1366-1382, 2014 | 52 | 2014 |
An integrated CMOS passive self-interference mitigation technique for FDD radios T Zhang, AR Suvarna, V Bhagavatula, JC Rudell IEEE Journal of Solid-State Circuits 50 (5), 1176-1188, 2015 | 49 | 2015 |
A scalable, highly-multiplexed delta-encoded digital feedback ECoG recording amplifier with common and differential-mode artifact suppression WA Smith, JP Uehlin, SI Perlmutter, JC Rudell, VS Sathe 2017 Symposium on VLSI Circuits, C172-C173, 2017 | 42 | 2017 |
A 0.0023 mm/ch. Delta-Encoded, Time-Division Multiplexed Mixed-Signal ECoG Recording Architecture With Stimulus Artifact Suppression JP Uehlin, WA Smith, VR Pamula, SI Perlmutter, JC Rudell, VS Sathe IEEE transactions on biomedical circuits and systems 14 (2), 319-331, 2019 | 41 | 2019 |
A 0.8–2 GHz Fully-Integrated QPLL-Timed Direct-RF-Sampling BandpassADC in 0.13m CMOS S Gupta, D Gangopadhyay, H Lakdawala, JC Rudell, DJ Allstot IEEE Journal of Solid-State Circuits 47 (5), 1141-1153, 2012 | 40 | 2012 |