A review of 0.18-/spl mu/m full adder performances for tree structured arithmetic circuits CH Chang, J Gu, M Zhang IEEE Transactions on very large scale integration (VLSI) systems 13 (6), 686-695, 2005 | 637 | 2005 |
Spectral Techniques in Digital Logic CH Chang Nanyang Technological University, 1997 | 529 | 1997 |
Ultra low-voltage low-power CMOS 4-2 and 5-2 compressors for fast arithmetic circuits CH Chang, J Gu, M Zhang IEEE Transactions on Circuits and Systems I: Regular Papers 51 (10), 1985-1997, 2004 | 489 | 2004 |
An area efficient 64-bit square root carry-select adder for low power applications Y He, CH Chang, J Gu 2005 IEEE International Symposium on Circuits and Systems (ISCAS), 4082-4085, 2005 | 299 | 2005 |
A novel hybrid pass logic with static CMOS output drive full-adder cell M Zhang, J Gu, CH Chang 2003 IEEE International Symposium on Circuits and Systems (ISCAS) 5, V-V, 2003 | 268 | 2003 |
Residue number systems: A new paradigm to datapath optimization for low-power and high-performance digital signal processing applications CH Chang, AS Molahosseini, AAE Zarandi, TF Tay IEEE circuits and systems magazine 15 (4), 26-44, 2015 | 180 | 2015 |
An efficient reverse converter for the 4-moduli set {2/sup n/-1, 2/sup n/, 2/sup n/+ 1, 2/sup 2n/+ 1} based on the new Chinese remainder theorem B Cao, CH Chang, T Srikanthan IEEE Transactions on Circuits and Systems I: Fundamental Theory and …, 2003 | 169 | 2003 |
A retrospective and a look forward: Fifteen years of physical unclonable function advancement CH Chang, Y Zheng, L Zhang IEEE Circuits and Systems Magazine 17 (3), 32-62, 2017 | 160 | 2017 |
A residue-to-binary converter for a new five-moduli set B Cao, CH Chang, T Srikanthan IEEE Transactions on Circuits and Systems I: Regular Papers 54 (5), 1041-1049, 2007 | 156 | 2007 |
A low-power hybrid RO PUF with improved thermal stability for lightweight applications Y Cao, L Zhang, CH Chang, S Chen IEEE Transactions on computer-aided design of integrated circuits and …, 2015 | 148 | 2015 |
New adaptive color quantization method based on self-organizing maps CH Chang, P Xu, R Xiao, T Srikanthan IEEE transactions on neural networks 16 (1), 237-249, 2005 | 148 | 2005 |
Halide perovskite memristors as flexible and reconfigurable physical unclonable functions RA John, N Shah, SK Vishwanath, SE Ng, B Febriansyah, ... Nature Communications 12 (1), 3681, 2021 | 140 | 2021 |
An overview of hardware security and trust: Threats, countermeasures, and design tools W Hu, CH Chang, A Sengupta, S Bhunia, R Kastner, H Li IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020 | 124 | 2020 |
A robust FSM watermarking scheme for IP protection of sequential circuit design A Cui, CH Chang, S Tahar, AT Abdel-Hamid IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2011 | 117 | 2011 |
Exploiting process variations and programming sensitivity of phase change memory for reconfigurable physical unclonable functions L Zhang, ZH Kong, CH Chang, A Cabrini, G Torelli IEEE Transactions on Information Forensics and Security 9 (6), 921-932, 2014 | 113 | 2014 |
Design of low-complexity FIR filters based on signed-powers-of-two coefficients with reusable common subexpressions F Xu, CH Chang, CC Jong IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2007 | 113 | 2007 |
Contention resolution algorithm for common subexpression elimination in digital filter design F Xu, CH Chang, CC Jong IEEE Transactions on Circuits and Systems II: Express Briefs 52 (10), 695-700, 2005 | 109 | 2005 |
Reliable and modeling attack resistant authentication of arbiter PUF in FPGA implementation with trinary quadruple response SS Zalivaka, AA Ivaniuk, CH Chang IEEE Transactions on Information Forensics and Security 14 (4), 1109-1123, 2018 | 103 | 2018 |
Information theoretic approach to complexity reduction of FIR filter design CH Chang, J Chen, AP Vinod IEEE Transactions on Circuits and Systems I: Regular Papers 55 (8), 2310-2321, 2008 | 99 | 2008 |
A power-delay efficient hybrid carry-lookahead/carry-select based redundant binary to two's complement converter Y He, CH Chang IEEE Transactions on Circuits and Systems I: Regular Papers 55 (1), 336-346, 2008 | 99 | 2008 |