| A Temperature-Aware Framework on gm/ID-Based Methodology Using 180 nm SOI From −40 °C to 200 °C JRRDO Martins, A Mostafa, J Juillard, R Hamani, FDO Alves, PM Ferreira IEEE Open Journal of Circuits and Systems 2, 311-322, 2021 | 9 | 2021 |
| Process-voltage-temperature analysis of a CMOS-MEMS readout architecture PM Ferreira, JRRO Martins, A Mostafa, J Juillard 2019 Symposium on Design, Test, Integration & Packaging of MEMS and MOEMS …, 2019 | 6 | 2019 |
| Development of PSpice modeling platform for 10 kV/100 A SiC MOSFET power module J Martins, M Nawaz, K Ilves, F Iannuzzo 2017 IEEE Energy Conversion Congress and Exposition (ECCE), 4358-4365, 2017 | 6 | 2017 |
| IC-Layout Render: Image rendering tool for integrated circuit layout in Python JRRO Martins, F Alves, PM Ferreira | 4 | 2021 |
| An adaptative ratio-metric analog-to-digital interface for weakly-coupled resonant sensors based on mutually injection-locked oscillators A Mostafa, J Juillard, JR Raposo, PM Ferreira 2019 Symposium on Design, Test, Integration & Packaging of MEMS and MOEMS …, 2019 | 4 | 2019 |
| Temperature-aware gm/ID-based methodology for active inductor design JRRO Martins, E Avignon-Meseldzija, PM Ferreira Workshop on Circuits and System Design, 2019 | 3 | 2019 |
| A general gm/Id temperature-aware design methodology using 180 nm CMOS up to 250° C JRRO Martins, F de Oliveira Alves, PM Ferreira Journal of Integrated Circuits and Systems 17 (1), 1-9, 2022 | 2 | 2022 |
| MOSLab: From Semiconductor to Transistor-Level Modeling in Julia JRRO Martins, PM Ferreira, F Alves | 1 | 2021 |
| A 237 ppm/° C L-Band Active Inductance Based Voltage Controlled Oscillator in SOI 0.18 µm J Martins, F Alves, PM Ferreira 2021 34th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems …, 2021 | 1 | 2021 |
| A gm/Id based methodology to estimate OTA requirements in low-pass discrete time Σ∆-ADCs A Mostafa, JRRO Martins, J Juillard, PM Ferreira 2024 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2024 | | 2024 |
| A Physically-Based Matching Model for HiSIM_HV R Hamani, JROR Martins, H Wald, J Gessner, MOI Ing 2023 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and …, 2023 | | 2023 |
| From Semiconductor to Transistor-Level: Modeling, Simulation, and Layout Rendering Tools JRRO Martins, F Alves, PM Ferreira Colloque du GdR SOC2, 2022 | | 2022 |
| A Temperature-Aware Framework for Analog Design Using a gm/ID Approach JRR de Oliveira Martins Université Paris-Saclay, 2021 | | 2021 |
| Méthodologie de Conception Conscient des Variations en Température: Circuits de Lecture pour les Environnements Sous Contraintes JRRO Martins, PM Ferreira Journées Nationales du Réseau Doctoral en Micro-nanoélectronique (JNRDM), 2019 | | 2019 |
| circuit layout in Python JRRO Martins, F Alves, PM Ferreira | | |
| A design methodology to create pairs of filters with matched responses J Martins, F Kassab The 2010 IEEE International Conference on Information and Automation, 0 | | |
