Cell stability analysis of conventional 6T dynamic 8T SRAM cell in 45nm technology K Dhanumjaya, M Sudha, MNG Prasad, K Padmaraju International Journal of VLSI design & Communication Systems 3 (2), 41, 2012 | 36 | 2012 |
Design of low power SRAM in 45 nm CMOS technology K Dhanumjaya, DMG Prasad, K Padmaraju, DMR Reddy International Journal of Engineering Research and Applications (IJERA) 1 (4 …, 2009 | 14 | 2009 |
Design and modeling of power efficient, high performance 32-bit ALU through advanced HDL synthesis K Dhanumjaya, G Kiran Kumar, MN Giriprasad, M Raja Reddy Information and Communication Technologies: International Conference, ICT …, 2010 | 9 | 2010 |
Performance analysis of low power full adder cells using 45nm CMOS technology K Dhanunjaya, G Prasad, K Padmaraju International Journal of Microelectronics Engineering (IJME) 1 (1), 2015 | 4 | 2015 |
Low Power and Improved Read Stability Cache Design in 45nm Technology K Dhanumjaya, MNG Prasad, K PAdmaraju, MR Reddy International Journal of Engineering Research and Development eISSN: 2278 …, 2012 | 3* | 2012 |
Kindiling And PerceptionOf Qr-Images Using Raspberry-PI K DHANUNJAYA International Journal Of Engineering And Computer Science 4 (Issue 7), 13082 …, 2015 | 2* | 2015 |
Low Power Logic Gate cell design and its performance analysis K Dhanumjaya, MNG Prasad Turkish Journal of Computer and Mathematics Education (TURCOMAT) 13 (2 …, 2022 | 1 | 2022 |
Low Power Standard Logic Gate Cells Design and its Power & Delay Analysis DMNGP K.Dhanumjaya JOURNAL OF ALGEBRAIC STATISTICS 13 (1), 797-809, 2022 | 1 | 2022 |
Security-Enabled Near-Field Communication Tag with Flexible Architecture Supporting Asymmetric Cryptography PM Sandhya, K Dhanunjaya ISSN, 2015 | 1* | 2015 |
ANALYSIS AND MODELING OF LOW POWER ARRAY MULTIPLIERS USING CADENCE VIRTUOSO SIMULATOR IN 45 nm TECHNOLOGY BV KRISHNA, K Dhanunjaya Development (IJECIERD) 3 (4), 49-64, 2013 | 1 | 2013 |
LASER BASED SECURITY SYSTEM K Dhanunjaya, AS Kumar Industrial Engineering Journal 52 (4), 2299-2303, 2023 | | 2023 |
MEMORY CONTROLLER FOR DDR SDRAM AND IT'S VERIFICATION USING VERILOG FOR DSP PROCESSORS PCN Lalithya, K Dhanumjaya International Journal of Engineering Research and Applications(IJERA) 13 (10 …, 2023 | | 2023 |
MEMORY CONTROLLER FOR DDR SDRAM AND IT'S VERIFICATION USING VERILOG FOR DSP PROCESSORS PCNL K.Dhanumjaya ZKG INTERNATIONAL 8 (2), 218-227, 2023 | | 2023 |
LEAF DISEASE DETECTION AND CLIMATIC PARAMETER MONITORING OF PLANTS USING IOT. MS Reddy, K Dhanunjaya JOURNAL OF INFORMATION AND COMPUTATIONAL SCIENCE 13 (10), 215-220, 2023 | | 2023 |
RAIN WATER HARVESTING AND WATER QUALITYMONITORINGUSING IoT K Dhanumjaya ZKG INTERNATIONAL 8 (I), 1231-1236, 2023 | | 2023 |
DESIGN A HIGH SPEED AND AREA EFFICIENT HYBRID KS AND BK TREE ADDER ARCHITECTURE K Dhanumjaya Advanced Engineering Science 54 (2), 6821-6830, 2022 | | 2022 |
Power Efficient XOR & XNOR Cell Design using 45 nm CMOS Technology and its Power Analysis K Dhanumjaya, MNG Prasad Journal of Optoelectronics Laser 41 (6), 947-955, 2022 | | 2022 |
Low Power & Application Specific ALU and its Performance Analysis K Dhanumjaya, MNG Prasad Solid State Technology 65 (1), 119-128, 2022 | | 2022 |
Low Power Adder Architectures and its Power Analysis using 45 NM CMOS Technology K Dhanumjaya, MNG Prasad Solid State Technology 65 (1), 111-118, 2022 | | 2022 |
Medical Assistant Robot to Serve Quarntine Patients Using Raspberry Pi PS Premtej, J Amarendra, SS Babu, K Dhanumjaya Solid State Technology 65 (1), 101-105, 2022 | | 2022 |