Framework for economical error recovery in embedded cores

G Upasani, X Vera, A Gonzalez - 2014 IEEE 20th International …, 2014 - ieeexplore.ieee.org
The vulnerability of the current and future processors towards transient errors caused by
particle strikes is expected to increase rapidly because of exponential growth rate of on-chip …

Temporal redundancy latch-based architecture for soft error mitigation

R Schmidt, A García-Ortiz, G Fey - 2017 IEEE 23rd International …, 2017 - ieeexplore.ieee.org
Current transients caused by energetic particle strikes are a serious threat for digital circuits
in aerospace applications. Such single-event transients (SETs) can corrupt the circuit state …

Setting an error detection infrastructure with low cost acoustic wave detectors

G Upasani, X Vera, A González - ACM SIGARCH Computer Architecture …, 2012 - dl.acm.org
The continuing decrease in dimensions and operating voltage of transistors has increased
their sensitivity against radiation phenomena making soft errors an important challenge in …

Reducing due-fit of caches by exploiting acoustic wave detectors for error recovery

G Upasani, X Vera, A González - 2013 IEEE 19th International …, 2013 - ieeexplore.ieee.org
Cosmic radiation induced soft errors have emerged as a key challenge in computer system
design. The exponential increase in the transistor count will drive the per chip fault rate sky …

Fault tolerant electronic system design

B Du, L Sterpone - 2017 IEEE International Test Conference …, 2017 - ieeexplore.ieee.org
Due to technology scaling, which means smaller transistor, lower voltage and more
aggressive clock frequency, VLSI devices are becoming more susceptible against soft …

Using bulk built-in current sensors and recomputing techniques to mitigate transient faults in microprocessors

F Leite, T Balen, M Herve… - 2009 10th Latin …, 2009 - ieeexplore.ieee.org
This work presents the application of a recomputing-based correction technique to mitigate
radiation effects on integrated processors. The recomputing process is associated to bulk …

Avoiding core's due & sdc via acoustic wave detectors and tailored error containment and recovery

G Upasani, X Vera, A González - ACM SIGARCH Computer Architecture …, 2014 - dl.acm.org
The trend of downsizing transistors and operating voltage scaling has made the processor
chip more sensitive against radiation phenomena making soft errors an important challenge …

Soft error issues with scaling technologies

S Baeg, J Bae, S Lee, CS Lim… - 2012 IEEE 21st Asian …, 2012 - ieeexplore.ieee.org
As transistor geometry shrinks, the erroneous and spurious charge from a particle strike
tends to be shared by multiple nodes and causes multiple nodes upset. Such SEU …

Variation-tolerant hierarchical voltage monitoring circuit for soft error detection

A Narsale, MC Huang - 2009 10th International Symposium on …, 2009 - ieeexplore.ieee.org
As device feature size continues to scale down to the nanometer regime, the decreasing
critical charge fundamentally reduces noise margins of devices and in turn increases the …

Single-event upset analysis and protection in high speed circuits

M Hosseinabady, P Lotfi-Kamran… - … IEEE European Test …, 2006 - ieeexplore.ieee.org
The effect of single-event transients (SETs)(at a combinational node of a design) on the
system reliability is becoming a big concern for ICs manufactured using advanced …