Method for fabricating a memory cell array
G Tempel, C Kutter - US Patent 6,531,359, 2003 - Google Patents
4,467,518 A 8/1984 Bansal et al............ 438/153 5,084,418 A* 1/1992 Esquivel et al.............
438/301 5,103,274 A 4/1992 Tang et al. 5,264,718 A 11/1993 Gill 5,589.413 A 12/1996 …
438/301 5,103,274 A 4/1992 Tang et al. 5,264,718 A 11/1993 Gill 5,589.413 A 12/1996 …
Method for fabricating a memory cell array
G Tempel, C Kutter - US Patent 6,531,359, 2003 - freepatentsonline.com
A method for fabricating a memory cell array, in particular an EPROM or EEPROM memory
cell array, includes burying insulation zones on a silicon substrate in accordance with an STI …
cell array, includes burying insulation zones on a silicon substrate in accordance with an STI …