This paper presents the high speed and area achieved using the Coordinate Rotation Digital Computer (CORDIC) algorithm for digital signal processing applications. There are many efficient algorithms for CORDIC, these algorithms there is shifters, adders, and subtractors for sine/cosine wave generation. In this paper proposed multiplexers based CORDIC algorithm. Multiplexers based Coordinate Rotation Digital Computer algorithm used to achievethe fast and efficient hardware on FPGA. A six-stage Coordinate Rotation Digital Computer is achieved by three arrangments proceeding by unrolled CORDIC and MUXes based CORDIC up to three stages, MUXes based CORDIC up to the fourth stage with and without pipelining. The proposed architecture for CORDIC adders, subtractors, and shifters, all are replaced by multiplexers up to the third stage and fourth stage. An 8bit and16-bit Coordinate Rotation Digital Computer to achieving the sine functions and cosine functions perform all methods on Xilinx Spartan 3E (XC3S250E) and Xilinx Virtex6 FPGA(XC6VLX240). Compared with the unrolled CORDIC MUXes based CORDIC achieves the high operating frequency and less area requires for hardware implementation.