Reducing DRAM Refresh Overheads with Refresh-Access Parallelism

KK Chang, D Lee, Z Chishti, AR Alameldeen… - arXiv preprint arXiv …, 2018 - arxiv.org
… the negative performance impact of DRAM refresh becomes exacerbated as DRAM density
… Using DSARP is a cost-e ective way to alleviate the increasing negative impact of refresh as …

Reducing Performance Impact of DRAM Refresh by Parallelizing Refreshes with Accesses

KKW Chang, D Lee, Z Chishti, AR Alameldeen… - arXiv preprint arXiv …, 2016 - arxiv.org
… of refreshes and accesses colliding within the same bank, we propose SARP (Subarray Access
Refresh Parallelization) … the increasing negative impact of refresh as our results show [1]. …

Improving energy efficiency of dram by exploiting half page row access

H Ha, A Pedram, S Richardson… - 2016 49th Annual …, 2016 - ieeexplore.ieee.org
improves energy efficiency of DRAM in multi-core systems. • We propose charge recycling
refresh that reduces both auto- and self-refreshparallelism provided with Half Page DRAM as …

[PDF][PDF] VRL-DRAM: improving DRAM performance via variable refresh latency.

A Das, H Hassan, O Mutlu - DAC, 2018 - people.inf.ethz.ch
… the performance overhead of DRAM refresh by reducing the latency of a refresh operation.
We … In this optimized version, called VRL-Access, we take advantage of the fact that a DRAM

Restore truncation for performance improvement in future DRAM systems

X Zhang, Y Zhang, BR Childers… - … on High Performance …, 2016 - ieeexplore.ieee.org
… We propose RT-select to better integrate refresh and restore. By increasing the refresh rate
… -f obtains the largest performance improvement because of the parallel access patterns and …

Hardware-software co-design to mitigate dram refresh overheads: A case for refresh-aware process scheduling

JB Kotra, N Shahidi, ZA Chishti, MT Kandemir - ACM SIGPLAN Notices, 2017 - dl.acm.org
… Our co-design refresh improves the performance in such high temperature environments
on an … Improving DRAM performance by parallelizing refreshes with accesses. In the 20th …

Using run-time reverse-engineering to optimize DRAM refresh

DM Mathew, ÉF Zulian, M Jung, K Kraft… - Proceedings of the …, 2017 - dl.acm.org
… much better than Auto-Refresh and Row Granular Refresh, and is more energy e cient
than Auto-… Improving DRAM performance by parallelizing refreshes with accesses. In High …

Retention-aware DRAM auto-refresh scheme for energy and performance efficiency

WK Cheng, PY Shen, XL Li - Micromachines, 2019 - mdpi.com
… Furthermore, to skip refresh non-weak rows, we accessed and increased the … refresh scheme
can properly improve the system performance and have a great reduction in DRAM refresh

Reducing DRAM refresh power consumption by runtime profiling of retention time and dual-row activation

H Choi, D Hong, J Lee, S Yoo - Microprocessors and Microsystems, 2020 - Elsevier
Refresh power of dynamic random-access memory (DRAM) … time, if we can increase the
refresh period of the DRAM chip by at … We perform parallel profiling while a DRAM chip is in idle …

Charge-aware DRAM refresh reduction with value transformation

S Kim, W Kwak, C Kim, D Baek… - … on High Performance …, 2020 - ieeexplore.ieee.org
… the performance penalty of refresh by scheduling optimization of memory commands and
parallelization of refresh with accesses. … This paper increase the scope of value-based refresh