A scalable high‐speed hybrid 1bit full adder design using XOR‐XNOR module

M Hasan, S Islam, M Hossain… - International Journal of …, 2021 - Wiley Online Library
… In this work, a novel FA design, that combines the benefits of … For condition 1 of the 2-input
XNOR gate, p 7 and p 8 transistors … and XOR signals appear on the gates of p 3 and n 3 . …

Low-power and fast full adder by exploring new XOR and XNOR gates

H Naseri, S Timarchi - IEEE transactions on very large scale …, 2018 - ieeexplore.ieee.org
… new hybrid 1-bit full-adder (FA) circuits based on the novel full-swing XOR–XNOR or XOR/XNOR
gates. … Saha, “A high speed 8 transistor full adder design using novel 3 transistor XOR …

A hybrid full adder design using multigate devices based on xor/xnor logic

VM Senthil Kumar, C Rathnakar, MA Guptha… - … System Design …, 2021 - Springer
… In this paper, the XOR/XNOR and XOR–XNOR circuits using CMOS and FinFET devices are
… A high speed 8 transistor full adder design using novel 3 transistor XOR gates. International …

A new full-adder design using XNOR-XOR circuit

S Gotam, R Kumar, V Singh - 2017 International conference on …, 2017 - ieeexplore.ieee.org
… , we have taken the transistors size for each full-adder circuit, … A new design 6t full adder
circuit using novel 2T XNOR gates… [8]. Radhakrishnan, D., 2001. Low-voltage low-power CMOS …

A high-speed and scalable XOR-XNOR-based hybrid full adder design

M Hasan, MS Hussain, M Hossain, M Hasan… - Computers & Electrical …, 2021 - Elsevier
… p 3 and p 4 , XNOR output is pulled up to strong logic 1. … , n 4 transistor is ON (input A = 1)
and XNOR output is pulled … PMOS p 8 provides strong logic 1 to the gate of n 11 since IND = 1

Eight Bit Full Adder Design Using Fifteen Transistors With Novel Five Transistors XNOR Gate

P Sritha, P Geethamani - 2019 International Conference on …, 2019 - ieeexplore.ieee.org
adder, unit two is the XNOR module and unit three is the carry … 8-bit full adder has been
proposed by using 15 transistors with … The simulation results were carried out by using Cadence …

Low power high speed full adder cell with XOR/XNOR Logic Gates in 90nm Technology

G Manikannan, K Mahendran… - … in Computers and …, 2017 - ieeexplore.ieee.org
… Here, we present a novel 1-bit full-adder cell using XOR-XNOR circuit, which offers … In
this paper, we proposed an XNOR gate using three transistors and eight transistors using

High-speed hybrid-logic full adder using high-performance 10-T XOR–XNOR cell

J Kandpal, A Tomar, M Agarwal… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
… embedded in 2-, 4-, and 8-bit cascaded full adder (CFA) structures… the FA is designed in a
single module using MOS transistors. … A novel XOR–XNOR circuit is proposed in Section-II and …

For Enhancing the Performance in Single Bit Hybrid Full Adder Circuits Using XNOR Gate

E Jadon, S Akashe - … International Conference, CNC 2020, Gwalior, India …, 2021 - Springer
single bit 16, 14, 10 and 8 transistor full adder designs are proposed in this paper. Key
purpose of the design is to swing fullThree most significant parameters of the VLSI system are …

Design and analysis of a novel low-power and energy-efficient 18T hybrid full adder

M Amini-Valashani, M Ayat, S Mirzakuchaki - Microelectronics journal, 2018 - Elsevier
… by modifying inverter and pass transistor based 3T XOR-XNOR gates combined … ones and
then, using this new cell and two other modules, a novel full adder circuit is … 8(d) as Module 3. …