Efficient Decoder for Optical Transport Networks Achieving Near Capacity Performance

S Kaul - 2019 - oaktrust.library.tamu.edu
… For small number of errors, we can provide explicit formulas … complete design on an
Application Specific Integrated Circuit(… of BCH decoder which is responsible for decoding the rows …

Comparative Analysis and Review of FPGA Based FEC Codes

P Rohith, M Ramesha - 2022 International Interdisciplinary …, 2022 - ieeexplore.ieee.org
application-specific integrated circuits (ASIC) platform. This manuscript discusses the commonly
used recent encoding and decoding … , BCH code, and concatenation of LDPC with BCH

Low-Density Parity-Check Code Decoder Design and Error Characterization on an FPGA Based Framework

B Unal - 2019 - search.proquest.com
… while using fewest Field Programmable Gate Array (FPGA) … not attainable with general purpose
processor (GPP) based simulations, … length, LDPC will outperform a BCH or RS code of a …

Integration of a real-time ccsds 410.0-b-32 error-correction decoder on fpga-based risc-v socs using risc-v vector extension

YM Kuo, MF Flanagan, F Garcia-Herrero… - … on Aerospace and …, 2023 - ieeexplore.ieee.org
… for both FPGA and application-specific integrated circuit (ASIC) … on in this work since it has
a small logic utilization, and at the … Finally, when compared to the original BCH code from the …

GPU-based, LDPC decoding for 5G and beyond

C Tarver, M Tonnemacher, H Chen… - IEEE Open Journal …, 2021 - ieeexplore.ieee.org
… codes for the broadcast channel (BCH), which mostly carries … of one GPU into multiple
smaller GPUs, which may be … CPUs, FPGAs, applicationspecific integrated circuits (ASICs), …

Channel coding for flash memories

J Spinner - 2019 - kops.uni-konstanz.de
… soft decoding is not practicable for long BCH-codes. In this dissertation, two soft decoding
… gate arrayss (FPGAs) and application-specific integrated circuit (ASIC), where the aspects …

A system on chip based error detection and correction implementation for nanosatellites

CP Hillier - 2018 - etd.cput.ac.za
… This thesis focuses on an EDAC-based solution, as digital/programmed solutions are more
… error location during decoding. This results in Bose Chaudhuri Hocquenghem (BCH) codes …

[PDF][PDF] Design, Implementation, and Characterization of Custom RISC-V Soft-Core Processors for Future Communication Networks

YM Kuo, F Garcia-Herrero, JAM de la Cuerda - 2022 - researchgate.net
decoding. When the NB-LDPC decoding process is finished, the same onboard processor
… The SweRV-EL2 core (WD, 2020) was chosen in this work since it is a small processor, and …

[图书][B] FPGA Micro-Architecture-Code Co-Design For Low-Density Parity-Check Codes For Flash Memories

R Nakhjavani - 2021 - search.proquest.com
… flash memories and define a finite decoder design space. Finally, … Compared to BCH codes,
the higher noise threshold of … In general, LDPC decoders for codes with smaller block sizes …

ROSETTA: A Resource and Energy-Efficient Inference Processor for Recurrent Neural Networks Based on Programmable Data Formats and Fine Activation Pruning

J Kim, TH Kim - IEEE Transactions on Emerging Topics in …, 2022 - ieeexplore.ieee.org
… the field-programmable gate array and application-specific … is much smaller than those of
the previous processors. This … using RNN encoder-decoder for statistical machine translation…