A design flow for an optimized congestion-aware application-specific wireless network-on-chip architecture

A Dehghani - Future Generation Computer Systems, 2020 - Elsevier
… The hybrid wired/wireless NoC architecture is dominated by solutions for on-chip … designing
WiNoC architectures is the choice of a wired basic infrastructure of WiNoC architectures

H2WNoC: A honeycomb hardware-efficient wireless network-on-chip architecture

M Alaei, F Yazdanpanah - Nano Communication Networks, 2019 - Elsevier
… to a core, based on the design methodology. The proposal of this paper, H 2 WNoC, is
designed as a hybrid wired/wireless network-on-chip architecture with honeycomb topology and …

A systematic analysis of power saving techniques for wireless network-on-chip architectures

F Yazdanpanah, R Afsharmazayejani - Journal of Systems Architecture, 2022 - Elsevier
… Finally, the received data flit is ready for additional processing at the hybrid router. On …
In hybrid wired/wireless architectures, communication between the cores locating in short …

Mapping wired links in a hybrid wired-wireless network-on-chip

SS Oliveira, GEP Lima, MM Pereira… - 2020 X Brazilian …, 2020 - ieeexplore.ieee.org
… a hierarchical architecture based on wireless network on chip … Cycle-accurate network on
chip simulation with noxim. ACM … mapping algorithm for wireless network-on-chip. In 2015 23rd …

Design of a three level hierarchical hybrid wired-wireless Network-on-Chip architecture

LK Varanasi, BKN Srinivasarao - 2024 - researchsquare.com
hybrid wired-wireless Network-on-Chip (NoC) architectures are proposed in this article.
Various hybrid wired-wireless … Different hybrid wired-wireless configurations have been …

Exploiting data resilience in wireless network-on-chip architectures

G Ascia, V Catania, S Monteleone, M Palesi… - ACM Journal on …, 2020 - dl.acm.org
… wireless Network-on-Chip (WiNoC) architectures are a viable solution for addressing the
scalability limitations of manycore architectures … system in manycore architectures. We present …

A load-balanced congestion-aware routing algorithm based on time interval in wireless network-on-chip

S Mikaeeli Mamaghani, MA Jabraeil Jamali - Journal of Ambient …, 2019 - Springer
… At the architecture level, on–off key modulation is a good … Hop count in the hybrid wired/wireless
routing should be … latency parameter in the hybrid wired/wireless routing. Taking these …

DCBuf: a high-performance wireless network-on-chip architecture with distributed wireless interconnects and centralized buffer sharing

C Sun, Y Ouyang, Y Lu - Wireless Networks, 2022 - Springer
… express channels for NoCs architecture via hybrid wireless channels [27], and the WiNoC …
[29] proposed O RTHO NoC, a wired-wireless architecture that differs from existing schemes in …

[图书][B] Network-on-chip topologies: Potentials, technical challenges, recent advances and research direction

IA Alimi, RK Patel, O Aboderin, AM Abdalla… - 2021 - intechopen.com
… by hybrid processing network elements. The limitations are mainly owing to the bus-based
interconnection architecture’… So, the requirements are challenging for the SoC architectures to …

Architecting a congestion pre-avoidance and load-balanced wireless network-on-chip

C Sun, Y Ouyang, H Liang - Journal of Parallel and Distributed Computing, 2022 - Elsevier
design a wireless router micro-architecture; Finally, a threshold-based load-balanced mechanism
is designed, … The authors proposed a wired-wireless architecture named ORTHONoC …