Comparative Performance analysis of XOR-XNOR cell used in Hybrid Logic based Full adder

AK Gautam, P Karuppanan, SK Reddy… - … on Advances in …, 2021 - ieeexplore.ieee.org
… 8085 it was an 8 bit microprocessor with 64KB memory [1]. Till … the design of XORXNOR
circuit using 6 transistors however … Mirzakuchaki, “Design and analysis of a novel low-power …

Design and implementation of high-performance 20-T hybrid full adder circuit

J Kandpal, A Tomar - Analog Integrated Circuits and Signal Processing, 2024 - Springer
… /exclusive NOR (XOR/XNOR) architecture with ten transistors is … [8] present an exclusive
OR/exclusive NOR; however, the circuit … A novel hybrid full adder based on gate diffusion input …

[PDF][PDF] Multipliers Designs Using Low Power Full Swing Exclusive-OR and Exclusive-NOR Structures

J Francischezhiyan, BJC Prasad, P Kumar… - ijetcse.com
… Here, using novel Exclusive-OR to Exclusive-NOR we are designing a full adder 1-bit in 6
… delay and power consumtion of Hybrid full adder - 22 Transistor and Hybrid full adder - 19 …

[PDF][PDF] Design and analysis of different full adder cells using new technologies

ND Kumar, RP Somineni… - Int J …, 2020 - download.garuda.kemdikbud.go.id
… level will be having XOR/XNOR logic operation and finally fourth … MNM CNTFET 1-bit FAC
is shown in the below Figure 8. The … The TGM 1-bit FAC is designed by using 25 transistors

Design of Compact and Smart Full Adders for High-Speed Nanometer Technology IC's

KM Priyadarshini, RSE Ravindran… - journal of Physics …, 2021 - iopscience.iop.org
… A complete adder logic is designed in such a way that eight … of two 4-transistor XNOR circuits
constructed using CMOS … dissipation from 1-bit to 32-bit full adder designed using 14T is …

Design and performance analysis of low power high speed adder and multiplier using MTCMOS in 90nm, 70nm, 25nm and 18nm regime

K Ka, P Ba, P Rb, AK Sivaramanb… - Smart Intelligent …, 2021 - ebooks.iospress.nl
Full adder is one of the fundamental digital circuits that make … speed and reduced
implementation area [8]. The number of … The XNOR Module is constructed using 6T (6 transistors) …

[PDF][PDF] DESIGN AND ANALYSIS OF LOW POWER HYBRID CMOS FULL ADDER

PK CHANDRASHEKAR - ijarst.in
… , novel circuits for XOR/XNOR and simultaneous XOR–XNOR … namely CMOS logic and
Pass transistor logic. This method … 8) SCDM uses the advantages of various rationale styles as …

A novel efficient cnfet-based inexact full adder design for image processing applications

YS Mehrabani, M Parsapour, M Moradi… - International Journal …, 2021 - World Scientific
… XOR/XNOR function.The AXA1, AXA2 and AXA3 consist of 8, 6 and 8 transistors in their
design and 4, 3 and 3 … In this section, a novel design for one-bit inexact full adder cell has been …

A Unique design of hybrid full adder for the application of low power VLSI circuits

SS Singh, D Leishangthem, MN Shah… - 2020 4th …, 2020 - ieeexplore.ieee.org
… based FA used twenty-eight numbers of transistors. Also, the … of XNOR is applied in between
PM3 and NM3 transistors of the … Mirzakuchaki, “Design and analysis of a novel low-power …

An efficient CMOS dynamic logic-based full adder

S Akhter, S Chaturvedi, S Khan… - 2020 6th International …, 2020 - ieeexplore.ieee.org
… and XNOR logic gates are used in the implementation of full … In the proposed 1-bit full adder,
10 transistors are required for … 8, the input and output waveforms of the full adder, ie A, B, …