… CPL logic [6,7,8,9]. CMOS does not … It concurrently generates the XOR and XNOR functions
using a six transistor … to investigate novel design techniques since none of the entire adder …

… efficiency in full adder we need to optimize XOR/XNOR gates. we … In 14T full adder circuit,
some of the transistor has full swing … A novel full adder has been designed for optimized power …

… designs are designed using multiplexor, XOR and XNOR … CMOS logic [8], iii) Complementary
pass-transistor logic (CPL) [9]… , novel adder/subtractor circuit designs, namely, FHAS-1 and …

… by a novel AND gate and a modified hybrid full adder (FA) … , the transistor Mx is removed,
and Ā as one of the XNOR inputs is … , 4 HAs, and 8 FAs, which are 73 gates and 290 transistors. …

… Thus, A novel 10 Transistor (10T) full adder is designed and … number of transistors, which is
consisting of XOR-XNOR, AND-… the full adder using gate diffusion input technology with eight …

… of minimizing the transistor count in XOR and XNOR gates in [2]. Wang, Fang and Feng in
[… the design of a novel eight transistor full adder using novel three transistor XOR gates. The …

… have proposed the design of novel robust full adder, testable … digital electrical devices without
using transistors, and it has … -even parity gate (T-EPG) and the digital exclusive-NOR gate …

… Novel 1-bit full adder using hybrid logic is presented here for low … The Chang adder design
is performed with 16 transistors and … The Figure 2 shows that the full adder circuit is split into 3 …

… A from both TG transistors to set the XNOR input to logic ‘1’, … rapid 4-bit full adder with XOR
and XNOR gates,” IJSDR, vol. … , fast full adder using novel XOR and XNOR gates,” Int. J. Intell. …

… CMOS and CPL [8] is that pass transistor is an input from the … required 4 Transistors XOR
and XNOR circuits and 2-to-1 … Novel low power full adder cells in 180 nm CMOS technology. …