A 275 Gbps AES encryption accelerator using ROM-based S-boxes in 65nm
B Erbagci, NEC Akkaya… - 2015 IEEE Custom …, 2015 - ieeexplore.ieee.org
The implementation of the SubBytes (or S-Box) step of the AES algorithm significantly
contributes to the area, delay, and power of AES accelerators. Unlike typical logic gate S …
contributes to the area, delay, and power of AES accelerators. Unlike typical logic gate S …
A 275 Gbps AES encryption accelerator using ROM-based S-boxes in 65nm
B Erbagci, NEC Akkaya, C Teegarden, K Mai - 2015 IEEE Custom Integrated … - infona.pl
The implementation of the SubBytes (or S-Box) step of the AES algorithm significantly
contributes to the area, delay, and power of AES accelerators. Unlike typical logic gate S …
contributes to the area, delay, and power of AES accelerators. Unlike typical logic gate S …