Modified scan flip-flop for low power testing
A Mishra, N Sinha, V Singh… - 2010 19th IEEE …, 2010 - ieeexplore.ieee.org
Scanning of test vectors during testing causes unnecessary and excessive switching in the
combinational circuit compared to that in the normal operation. In this paper, we propose a …
combinational circuit compared to that in the normal operation. In this paper, we propose a …
Modified Scan Flip-Flop for Low Power Testing
A Mishra, N Sinha, V Singh, S Chakravarty… - 2010 19th IEEE Asian Test … - infona.pl
Scanning of test vectors during testing causes unnecessary and excessive switching in the
combinational circuit compared to that in the normal operation. In this paper, we propose a …
combinational circuit compared to that in the normal operation. In this paper, we propose a …
Modified Scan Flip-Flop for Low Power Testing
A Mishra, N Sinha, Satdev, V Singh… - Proceedings of the …, 2010 - dl.acm.org
Scanning of test vectors during testing causes unnecessary and excessive switching in the
combinational circuit compared to that in the normal operation. In this paper, we propose a …
combinational circuit compared to that in the normal operation. In this paper, we propose a …
Modified Scan Flip-Flop for Low Power Testing
A Mishra, N Sinha, V Singh, S Chakravarty… - 2010 19th IEEE Asian …, 2010 - computer.org
Scanning of test vectors during testing causes unnecessary and excessive switching in the
combinational circuit compared to that in the normal operation. In this paper, we propose a …
combinational circuit compared to that in the normal operation. In this paper, we propose a …